Microprocessor Which language could be used for programming an FPGA. VHDL None Verilog Both A and B VHDL None Verilog Both A and B ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Two I/O devices Main memory and I/O devices Cache and main memory Cache memory and I/O devices Two I/O devices Main memory and I/O devices Cache and main memory Cache memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? Program Counter. H-L. D-E. Stack Pointer. Program Counter. H-L. D-E. Stack Pointer. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is XRI 0FH ANI F0H XRI FOH ANI OFH XRI 0FH ANI F0H XRI FOH ANI OFH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SUB A instruction in 8085 reset zero and parity flags sets zero and carry flags sets zero and sign flags reset carry and sign flags reset zero and parity flags sets zero and carry flags sets zero and sign flags reset carry and sign flags ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T2 & T3 T3 & T4 T4 & T1 T1 & T2 T2 & T3 T3 & T4 T4 & T1 T1 & T2 ANSWER DOWNLOAD EXAMIANS APP
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