Microprocessor How can we make any bit of a register “0”? AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following pair of gates can form a latch? A pair of cross coupled OR A cross coupled NAND/OR A pair of cross copled AND A pair of cross coupled NAND A pair of cross coupled OR A cross coupled NAND/OR A pair of cross copled AND A pair of cross coupled NAND ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor system with memory mapped I/O, which of the following is true? Arithmetic and logic operations can be directly performed with the I/O data Devices are accessed using IN and OUT instructions Devices have 8-bit address line There can be maximum of 256 input devices and 256 output devices Arithmetic and logic operations can be directly performed with the I/O data Devices are accessed using IN and OUT instructions Devices have 8-bit address line There can be maximum of 256 input devices and 256 output devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During the execution of the instruction, the ________tests the status and control flags and updates them based on the results of executing the instruction. Bus Interface Unit (BIU) Execution Unit (EU) Both ‘c’ and ‘d’ None of these Bus Interface Unit (BIU) Execution Unit (EU) Both ‘c’ and ‘d’ None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many segments are there in 8086? 6. 3. 2. 4. 6. 3. 2. 4. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T2 & T3 T1 & T2 T3 & T4 T4 & T1 T2 & T3 T1 & T2 T3 & T4 T4 & T1 ANSWER DOWNLOAD EXAMIANS APP
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