Microprocessor A combinational PLD with a fixed AND array and a programmable OR array is called a PROM PAL PLA PLD PROM PAL PLA PLD ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which language could be used for programming an FPGA. None Both A and B VHDL Verilog None Both A and B VHDL Verilog ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2000H and 1999H to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2002H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2002H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion (A): Negative values of incremental operator in DO loop are allowed in Fortran 77 but not in earlier versions of Fortran. Reason (R): Fortran 77 has better array facilities than earlier versions of Fortran. A is wrong R is correct Both A and R are correct and R is correct explanation of A Both A and R are correct but R is not correct explanation of A A is correct R is wrong A is wrong R is correct Both A and R are correct and R is correct explanation of A Both A and R are correct but R is not correct explanation of A A is correct R is wrong ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following microprocessor has 16-bit data bus? 68000 Z-80 8085 6502 68000 Z-80 8085 6502 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) None of these ANSWER DOWNLOAD EXAMIANS APP
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