Microprocessor A combinational PLD with a fixed AND array and a programmable OR array is called a PLD PLA PROM PAL PLD PLA PROM PAL ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor based system maximum possible number of input/output devices can be connected using I/O mapped I/O technique is 512 65536 256 64 512 65536 256 64 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with lower order address lines None of these higher order address lines status lines lower order address lines None of these higher order address lines status lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is negated R is asserted, S is asserted R is negated, S is asserted R is negated, S is negated R is asserted, S is negated R is asserted, S is asserted R is negated, S is asserted R is negated, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor FPGA means Field Programmable Gate Array Forward Programmable Gate Array Field Parallel Gate Array Forward Parallel Gate Array Field Programmable Gate Array Forward Programmable Gate Array Field Parallel Gate Array Forward Parallel Gate Array ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “0”? AND that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
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