Microprocessor SPHL instruction copies the content of H-L register pair to the _________. PSW B-C D-E Stack Pointer PSW B-C D-E Stack Pointer ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Inintel 8085A microprocessor ALE signal is made high to To disable data bus Enable the data bus to be used as low order address bus To achieve all the functions listed above To latch data D0-D7 from data bus To disable data bus Enable the data bus to be used as low order address bus To achieve all the functions listed above To latch data D0-D7 from data bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A mask programmed ROM is programmed at the time of fabrication programmed by the user erasable electrically erasable and programmable programmed at the time of fabrication programmed by the user erasable electrically erasable and programmable ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A number of 1-bit registers used in microprocessors to indicate certain conditions are usually referred to as shift registers counters flags latches shift registers counters flags latches ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Using one 8259 IC is equivalent to providing …………. INTR pins on 8085 16 18 12 8 16 18 12 8 ANSWER DOWNLOAD EXAMIANS APP
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