Microprocessor SPHL instruction copies the content of H-L register pair to the _________. B-C PSW Stack Pointer D-E B-C PSW Stack Pointer D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The correct sequence of steps in the instruction cycle of a basic computer is Read effective address, Decode, Fetch and Execute. Fetch, Decode, Read effective address and, Execute. Fetch, Execute, Decode and Read effective address. Fetch, Read effective address, Decode and Execute. Read effective address, Decode, Fetch and Execute. Fetch, Decode, Read effective address and, Execute. Fetch, Execute, Decode and Read effective address. Fetch, Read effective address, Decode and Execute. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While INX B instruction execute, only carry and zero flags will be affected all flags will be affected only carry flag will be affected no flags will be affected only carry and zero flags will be affected all flags will be affected only carry flag will be affected no flags will be affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? both ‘a’ and ‘b’ TRAP RST 6.5 RST 5.5 both ‘a’ and ‘b’ TRAP RST 6.5 RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor RST 3 instruction will cause the processor to branch to the location 0028H 0024H 0018H 0000H 0028H 0024H 0018H 0000H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T4 & T1 T1 & T2 T3 & T4 T2 & T3 T4 & T1 T1 & T2 T3 & T4 T2 & T3 ANSWER DOWNLOAD EXAMIANS APP
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