Microprocessor SPHL instruction copies the content of H-L register pair to the _________. PSW D-E Stack Pointer B-C PSW D-E Stack Pointer B-C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is negated R is negated, S is asserted R is asserted, S is asserted R is asserted, S is negated R is negated, S is negated R is negated, S is asserted R is asserted, S is asserted R is asserted, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The correct sequence of steps in the instruction cycle of a basic computer is Fetch, Decode, Read effective address and, Execute. Fetch, Execute, Decode and Read effective address. Read effective address, Decode, Fetch and Execute. Fetch, Read effective address, Decode and Execute. Fetch, Decode, Read effective address and, Execute. Fetch, Execute, Decode and Read effective address. Read effective address, Decode, Fetch and Execute. Fetch, Read effective address, Decode and Execute. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The address bus width of a microprocessor which is capable of addressing 64 Kbytes of the memory is 16 8 20 12 16 8 20 12 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? A memory read cycle An I/O read cycle An op-code fetch cycle A memory write cycle A memory read cycle An I/O read cycle An op-code fetch cycle A memory write cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because The data line can be multiplexed for both input and output It increases the speed of data transfer over the data bus More than one device can transmit information over the data bus by enabling only one device at a time More than one device can transmit over the data bus at the same time The data line can be multiplexed for both input and output It increases the speed of data transfer over the data bus More than one device can transmit information over the data bus by enabling only one device at a time More than one device can transmit over the data bus at the same time ANSWER DOWNLOAD EXAMIANS APP
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