Microprocessor A mask programmed ROM is erasable and programmable programmed at the time of fabrication erasable electrically programmed by the user erasable and programmable programmed at the time of fabrication erasable electrically programmed by the user ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The interrupt facility is provided in microprocessor to keep a control on the working of the microprocessor change the sequence of the instructions being executed stop the microprocessor when it starts malfunctioning stop the microprocessor when desired keep a control on the working of the microprocessor change the sequence of the instructions being executed stop the microprocessor when it starts malfunctioning stop the microprocessor when desired ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When referring to instruction words, a mnemonic is a short abbreviation for the operand address. a short abbreviation for the operation to be performed. shorthand for machine language. a short abbreviation for the data word stored at the operand address. a short abbreviation for the operand address. a short abbreviation for the operation to be performed. shorthand for machine language. a short abbreviation for the data word stored at the operand address. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The processor status word of 8085 microprocessor has five flags namely: S, Z, AC, P, OV S, Z, OV, P, CY S, Z, AC, P, CY S, OV, AC, P, CY S, Z, AC, P, OV S, Z, OV, P, CY S, Z, AC, P, CY S, OV, AC, P, CY ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor system with memory mapped I/O, which of the following is true? There can be maximum of 256 input devices and 256 output devices Arithmetic and logic operations can be directly performed with the I/O data Devices have 8-bit address line Devices are accessed using IN and OUT instructions There can be maximum of 256 input devices and 256 output devices Arithmetic and logic operations can be directly performed with the I/O data Devices have 8-bit address line Devices are accessed using IN and OUT instructions ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ Execution Unit (EU) None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) None of these Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
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