Microprocessor A mask programmed ROM is erasable and programmable erasable electrically programmed at the time of fabrication programmed by the user erasable and programmable erasable electrically programmed at the time of fabrication programmed by the user ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 003CH 0000H 0034H 002CH 003CH 0000H 0034H 002CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional A is true but R is false Both A & R are true and R is the correct explanation of A A is false but R is true Both A & R are true but R is not the correct explanation of A A is true but R is false Both A & R are true and R is the correct explanation of A A is false but R is true Both A & R are true but R is not the correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The interrupt facility is provided in microprocessor to stop the microprocessor when desired stop the microprocessor when it starts malfunctioning keep a control on the working of the microprocessor change the sequence of the instructions being executed stop the microprocessor when desired stop the microprocessor when it starts malfunctioning keep a control on the working of the microprocessor change the sequence of the instructions being executed ANSWER DOWNLOAD EXAMIANS APP
Microprocessor S0 and S1 pins are used for serial communication acknowledging the interrupt indicating the processor’s status None of these serial communication acknowledging the interrupt indicating the processor’s status None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following instruction is not possible in 8085? POP 30 H POP PSW POP D POP B POP 30 H POP PSW POP D POP B ANSWER DOWNLOAD EXAMIANS APP
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