Assertion (A): Each memory chip has its own address latch. Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.

Microprocessor
Assertion (A): Each memory chip has its own address latch. Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.

A is wrong R is correct

A is correct R is wrong

Both A and R are correct but R is not correct explanation of A

Both A and R are correct and R is correct explanation of A

A is wrong R is correct

A is correct R is wrong

Both A and R are correct but R is not correct explanation of A

Both A and R are correct and R is correct explanation of A

ANSWER DOWNLOAD EXAMIANS APP

Microprocessor
How many T-states are required for execution of OUT 80H instruction?

13

7

16

10

13

7

16

10

ANSWER DOWNLOAD EXAMIANS APP

Microprocessor
In 8085 microprocessor, the RST6 instruction transfer programme execution to following location

0060H.

0048H.

0024H.

0030H.

0060H.

0048H.

0024H.

0030H.

ANSWER DOWNLOAD EXAMIANS APP

Microprocessor
During OPCODE fetch the state of S0 and S1 is

00

11

10

01

00

11

10

01

ANSWER DOWNLOAD EXAMIANS APP

Microprocessor
DS directive in 8085

Forces the assembler to reserve one byte of memory

Forces the assembler to reserve a specified number of bytes in the memory

None of these

Forces the assembler to reserve a specified number of consecutive bytes in the memory

Forces the assembler to reserve one byte of memory

Forces the assembler to reserve a specified number of bytes in the memory

None of these

Forces the assembler to reserve a specified number of consecutive bytes in the memory

ANSWER DOWNLOAD EXAMIANS APP

Microprocessor
In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture.

Both ‘b’ and ‘c’

None of these

Bus Interface Unit (BIU)

Execution Unit (EU)

Both ‘b’ and ‘c’

None of these

Bus Interface Unit (BIU)

Execution Unit (EU)

ANSWER DOWNLOAD EXAMIANS APP

Microprocessor

Microprocessor Assertion (A): Each memory chip has its own address latch. Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.

Microprocessor How many T-states are required for execution of OUT 80H instruction?

Microprocessor In 8085 microprocessor, the RST6 instruction transfer programme execution to following location

Microprocessor During OPCODE fetch the state of S0 and S1 is

Microprocessor DS directive in 8085

Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture.

Microprocessor
Assertion (A): Each memory chip has its own address latch. Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.

Microprocessor
How many T-states are required for execution of OUT 80H instruction?

Microprocessor
In 8085 microprocessor, the RST6 instruction transfer programme execution to following location

Microprocessor
During OPCODE fetch the state of S0 and S1 is

Microprocessor
DS directive in 8085

Microprocessor
In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture.