Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T1 & T2 T3 & T4 T4 & T1 T2 & T3 T1 & T2 T3 & T4 T4 & T1 T2 & T3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Remains unchanged Halves Doubles Increases by 2^(address bits)/addressability Remains unchanged Halves Doubles Increases by 2^(address bits)/addressability ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick up the programmable interrupt controller from the following 8275 8257 8279 8259 8275 8257 8279 8259 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In microprocessor based system DMA refers to direct memory access for microprocessor None of these direct memory access for the I/O device direct memory access for the user direct memory access for microprocessor None of these direct memory access for the I/O device direct memory access for the user ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. B-C PSW Stack Pointer D-E B-C PSW Stack Pointer D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When an 8085 microprocessor is reset, the address bus contains 002CH 0000H 0043H 003CH 002CH 0000H 0043H 003CH ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS