Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T3 & T4 T2 & T3 T4 & T1 T1 & T2 T3 & T4 T2 & T3 T4 & T1 T1 & T2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a computer the data transfer between hard disk and CPU is nearly the same as that between diskette and CPU. False True False True ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Identify the programmable DMA controller from the following 8279 8251 8257 8253 8279 8251 8257 8253 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A number of 1-bit registers used in microprocessors to indicate certain conditions are usually referred to as counters flags latches shift registers counters flags latches shift registers ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. A is true but R is false. Both A & R are true and R is the correct explanation of A. A is false but R is true. Both A & R are true but R is not the correct explanation of A. A is true but R is false. Both A & R are true and R is the correct explanation of A. A is false but R is true. Both A & R are true but R is not the correct explanation of A. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a fixed OR array is called a PROM PAL PLD PLA PROM PAL PLD PLA ANSWER DOWNLOAD EXAMIANS APP
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