Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T1 & T2 T2 & T3 T4 & T1 T3 & T4 T1 & T2 T2 & T3 T4 & T1 T3 & T4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In microprocessor based system DMA refers to direct memory access for the I/O device direct memory access for the user direct memory access for microprocessor None of these direct memory access for the I/O device direct memory access for the user direct memory access for microprocessor None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Length of the instruction POP D is 4 byte 1 byte 3 byte 2 byte 4 byte 1 byte 3 byte 2 byte ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 6.5 both ‘a’ and ‘b’ TRAP RST 5.5 RST 6.5 both ‘a’ and ‘b’ TRAP RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor which one of the following statement is wrong there is a pin available for serial output serial I/O is possible through SIM and RIM instruction serial I/O is not possible there is a pin available for serial input there is a pin available for serial output serial I/O is possible through SIM and RIM instruction serial I/O is not possible there is a pin available for serial input ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Of the following circuits, the one which involves storage is RS Latch Mux Nand Decoder RS Latch Mux Nand Decoder ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS