Microprocessor
The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between

 T1 & T2
 T2 & T3
 T3 & T4
 T4 & T1

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Microprocessor
IN an intel 8085A microprocessor, why is READY signal used?

None of these
 To slow down a fast peripheral device so as to communicate at the microprocessor’s device.
 To indicate to user that the microprocessor is working and is ready for use.
 To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device.

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