Microprocessor How can we make any bit of a register “1”? OR that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. OR that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In order to save accumulator value on the stack, which of the following instruction may be used PUSH PSW POP PSW PUSH A PUSH SP PUSH PSW POP PSW PUSH A PUSH SP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of status flags present in 8085 microprocessor are 10 5 8 16 10 5 8 16 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor CALL instruction is a ______ instruction. 1 bytes 4 bytes 2 bytes 3 bytes 1 bytes 4 bytes 2 bytes 3 bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is asserted R is negated, S is negated R is negated, S is asserted R is asserted, S is negated R is asserted, S is asserted R is negated, S is negated R is negated, S is asserted R is asserted, S is negated ANSWER DOWNLOAD EXAMIANS APP
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