Microprocessor A combinational PLD with a programmable AND array and a fixed OR array is called a PLA PROM PLD PAL PLA PROM PLD PAL ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 which addressing mode is also called inherent addressing? Implicit Register Direct Immediate Implicit Register Direct Immediate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T1 OP code fetch T3 OP code fetch T4 OP code fetch T2 OP code fetch T1 OP code fetch T3 OP code fetch T4 OP code fetch T2 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T3 & T4 T2 & T3 T4 & T1 T1 & T2 T3 & T4 T2 & T3 T4 & T1 T1 & T2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A number of 1-bit registers used in microprocessors to indicate certain conditions are usually referred to as shift registers counters flags latches shift registers counters flags latches ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS