Microprocessor Which of the following interrupt is both level and edge sensitive? RST 5.5 TRAP RST 7.5 INTR RST 5.5 TRAP RST 7.5 INTR ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A sequence of two registers that multiplies the content of DE register pair by two and stores the result in HL register pair (in 8085 assembly language) is XCHG & DAD B XTHL & DAD H XCHG & DAD H PCHL & DAD D XCHG & DAD B XTHL & DAD H XCHG & DAD H PCHL & DAD D ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An 8-bit microprocessor signifies that 8-bit controller 8-bit data bus 8-bit address bus 8-interrupt lines 8-bit controller 8-bit data bus 8-bit address bus 8-interrupt lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations 0FFE H and 0FFF H 0FFF H and 0FFE H 1000 H and 0FFF H 1000 H and 1001 H 0FFE H and 0FFF H 0FFF H and 0FFE H 1000 H and 0FFF H 1000 H and 1001 H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor HLT opcode means store result in memory. load data to accumulator. load accumulator with contents of register. end of program. store result in memory. load data to accumulator. load accumulator with contents of register. end of program. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The register which holds the information about the nature of results of arithmetic and logic operations is called as Process status register Flag register Accumulator Condition code register Process status register Flag register Accumulator Condition code register ANSWER DOWNLOAD EXAMIANS APP
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