Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 5.5 RST 7.5 TRAP INTR RST 5.5 RST 7.5 TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ALU (Arithmetic and Logic Unit ) of 8085 microprocessor consists of Accumulator, arithmetic, logic circuits and five flags Accumulator, temporary register, arithmetic and logic circuits Accumulator, temporary register, arithmetic, logic circuits and five flags Accumulator, arithmetic and logic circuits Accumulator, arithmetic, logic circuits and five flags Accumulator, temporary register, arithmetic and logic circuits Accumulator, temporary register, arithmetic, logic circuits and five flags Accumulator, arithmetic and logic circuits ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When referring to instruction words, a mnemonic is a short abbreviation for the operand address. a short abbreviation for the data word stored at the operand address. shorthand for machine language. a short abbreviation for the operation to be performed. a short abbreviation for the operand address. a short abbreviation for the data word stored at the operand address. shorthand for machine language. a short abbreviation for the operation to be performed. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In microprocessor based system I/O ports are used to interface the O/P devices only all the I/O devices the I/P device only the I/O devices and memory chips the O/P devices only all the I/O devices the I/P device only the I/O devices and memory chips ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to address bus. incremented by one. transferred to memory address register . transferred to memory data register. transferred to address bus. incremented by one. transferred to memory address register . transferred to memory data register. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS