Microprocessor Which of the following interrupt is both level and edge sensitive? TRAP RST 5.5 RST 7.5 INTR TRAP RST 5.5 RST 7.5 INTR ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a programmable OR array is called a PLD PLA PAL PROM PLD PLA PAL PROM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with None of these lower order address lines higher order address lines status lines None of these lower order address lines higher order address lines status lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, the RST6 instruction transfer programme execution to following location 0030H. 0048H. 0024H. 0060H. 0030H. 0048H. 0024H. 0060H. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T4 OP code fetch T3 OP code fetch T1 OP code fetch T2 OP code fetch T4 OP code fetch T3 OP code fetch T1 OP code fetch T2 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
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