Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 5.5 RST 7.5 TRAP INTR RST 5.5 RST 7.5 TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In order to complement the lower nibble of accumulator one can use XRI 0FH CMA ORI 0FH ANI 0FH XRI 0FH CMA ORI 0FH ANI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Maximum number of I/O that can be addressed by the INTEL 8085 is 512 256 285 65536 512 256 285 65536 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Register pair used to indicate memory D and E W and Z H and L B and C D and E W and Z H and L B and C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During OPCODE fetch the state of S0 and S1 is 11 00 01 10 11 00 01 10 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a vector interrupt the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is obtained from a register in the processor. none. the branch address is assigned to a fixed location in memory. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is obtained from a register in the processor. none. the branch address is assigned to a fixed location in memory. ANSWER DOWNLOAD EXAMIANS APP
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