Microprocessor Which of the following interrupt is both level and edge sensitive? RST 7.5 INTR TRAP RST 5.5 RST 7.5 INTR TRAP RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor differentiates between op code, data/address at any time by the stack pointer its internal registers the sequence in which memory contents are fetched by it the program counter the stack pointer its internal registers the sequence in which memory contents are fetched by it the program counter ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An 8-bit microprocessor can have ………….. address lines. 16 32 cannot be predicted 8 16 32 cannot be predicted 8 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? H-L. Program Counter. Stack Pointer. D-E. H-L. Program Counter. Stack Pointer. D-E. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, the RST6 instruction transfer programme execution to following location 0030H. 0060H. 0024H. 0048H. 0030H. 0060H. 0024H. 0048H. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What are the sets of commands in a program which are not translated into machine instructions during assembly process, called? Mnemonics Directives Identifiers Operands Mnemonics Directives Identifiers Operands ANSWER DOWNLOAD EXAMIANS APP
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