Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 5.5 TRAP RST 7.5 INTR RST 5.5 TRAP RST 7.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Each instruction in assembly language program has the following fields:Lable fieldMnemonic fieldOperand fieldComment fieldThe correct sequence of these fields is? 2, 1, 4, 3 1, 2, 4, 3 2, 1, 3, 4 1, 2, 3, 4 2, 1, 4, 3 1, 2, 4, 3 2, 1, 3, 4 1, 2, 3, 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “0”? OR that bit with “1” and remaining bits with “0”. AND that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. AND that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 which addressing mode is also called inherent addressing? Implicit Direct Register Immediate Implicit Direct Register Immediate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Main memory and I/O devices Cache memory and I/O devices Two I/O devices Cache and main memory Main memory and I/O devices Cache memory and I/O devices Two I/O devices Cache and main memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The control flags in 8086 are: the interrupt flag(IF). the direction flag(DF). All of these the Trap flag(TF). the interrupt flag(IF). the direction flag(DF). All of these the Trap flag(TF). ANSWER DOWNLOAD EXAMIANS APP
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