Microprocessor Which of the following interrupt is both level and edge sensitive? TRAP RST 7.5 INTR RST 5.5 TRAP RST 7.5 INTR RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, no flags will be affected. all flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. no flags will be affected. all flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What are the sets of commands in a program which are not translated into machine instructions during assembly process, called? Directives Mnemonics Identifiers Operands Directives Mnemonics Identifiers Operands ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ‘Burst refresh’ in DRAM is also called None of these Concentrated refresh Hidden refresh Distributed refresh None of these Concentrated refresh Hidden refresh Distributed refresh ANSWER DOWNLOAD EXAMIANS APP
Microprocessor PSW stands for flag byte accumulator contents none accumulator and flag register contents flag byte accumulator contents none accumulator and flag register contents ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In one’s complement 8 bit representation 11111111 represents -1 1 +0 -0 -1 1 +0 -0 ANSWER DOWNLOAD EXAMIANS APP
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