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Microprocessor

Microprocessor
Which of the following interrupt is both level and edge sensitive?

 RST 7.5
 INTR
 TRAP
 RST 5.5

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Microprocessor
The number of interrupt lines in 8085 is

2
3
4
5

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Microprocessor
While INX B instruction execute,

 all flags will be affected
 no flags will be affected
 only carry flag will be affected
 only carry and zero flags will be affected

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Microprocessor
SPHL instruction copies the content of H-L register pair to the _________.

 D-E
 B-C
 PSW
 Stack Pointer

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Microprocessor
How many bytes in a zero memory page should be reserved for vectors used by RST instructions?

 32.
 128.
 16.
 64.

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Microprocessor
Let the content of register C be 00000000 before the instruction DCR C is executed. The content of register C after the after the execution of this instruction will be

 00000001
 11111111
 None
 00000000

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