Microprocessor Which of the following interrupt is both level and edge sensitive? RST 5.5 RST 7.5 INTR TRAP RST 5.5 RST 7.5 INTR TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The stack pointer resides in RAM may be in RAM or ROM resides in ROM resides in microprocessor resides in RAM may be in RAM or ROM resides in ROM resides in microprocessor ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, only carry and zero flags will be affected. all flags will be affected. no flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. all flags will be affected. no flags will be affected. only carry flag will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is known as DMA bus Control bus Address bus Memory bus DMA bus Control bus Address bus Memory bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “0”? AND that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. AND that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
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