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Microprocessor

Microprocessor
Which of the following interrupt is both level and edge sensitive?

 TRAP
 INTR
 RST 7.5
 RST 5.5

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Microprocessor
The microprocessor issues ALE during first T-state of

 memory READ cycle only
 fetch cycle only
 every machine cycle
 memory WRITE cycle only

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Microprocessor
RST 3 instruction will cause the processor to branch to the location

 0024H
 0028H
 0000H
 0018H

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Microprocessor
Which of the following instruction is not possible in 8085?

 POP PSW
 POP D
 POP 30 H
 POP B

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Microprocessor
In a computer the data transfer between hard disk and CPU is nearly the same as that between diskette and CPU.

False
True

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Microprocessor
Internet is a worldwide network of computers where most of the information is freely available.

True
False

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