Microprocessor Which of the following interrupt is both level and edge sensitive? RST 5.5 RST 7.5 INTR TRAP RST 5.5 RST 7.5 INTR TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, no flags will be affected. only carry flag will be affected. all flags will be affected. only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. all flags will be affected. only carry and zero flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a computer the data transfer between hard disk and CPU is nearly the same as that between diskette and CPU. False True False True ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Total number of instructions in 8085 microprocessor assembly language is 245 244 247 246 245 244 247 246 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2001H and 2002H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2000H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2000H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Remains unchanged Doubles Increases by 2^(address bits)/addressability Halves Remains unchanged Doubles Increases by 2^(address bits)/addressability Halves ANSWER DOWNLOAD EXAMIANS APP
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