Microprocessor Which of the following interrupt is both level and edge sensitive? RST 5.5 TRAP INTR RST 7.5 RST 5.5 TRAP INTR RST 7.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The correct sequence of steps in the instruction cycle of a basic computer is Read effective address, Decode, Fetch and Execute. Fetch, Read effective address, Decode and Execute. Fetch, Execute, Decode and Read effective address. Fetch, Decode, Read effective address and, Execute. Read effective address, Decode, Fetch and Execute. Fetch, Read effective address, Decode and Execute. Fetch, Execute, Decode and Read effective address. Fetch, Decode, Read effective address and, Execute. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional Both A & R are true and R is the correct explanation of A A is false but R is true Both A & R are true but R is not the correct explanation of A A is true but R is false Both A & R are true and R is the correct explanation of A A is false but R is true Both A & R are true but R is not the correct explanation of A A is true but R is false ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a programmable OR array is called a PLA PAL PROM PLD PLA PAL PROM PLD ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of status flags present in 8085 microprocessor are 5 16 8 10 5 16 8 10 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick up the programmable interrupt controller from the following 8259 8275 8257 8279 8259 8275 8257 8279 ANSWER DOWNLOAD EXAMIANS APP
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