Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 7.5 RST 5.5 TRAP INTR RST 7.5 RST 5.5 TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor system with memory mapped I/O, which of the following is true? Devices are accessed using IN and OUT instructions There can be maximum of 256 input devices and 256 output devices Arithmetic and logic operations can be directly performed with the I/O data Devices have 8-bit address line Devices are accessed using IN and OUT instructions There can be maximum of 256 input devices and 256 output devices Arithmetic and logic operations can be directly performed with the I/O data Devices have 8-bit address line ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 002CH 003CH 0000H 0034H 002CH 003CH 0000H 0034H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T1 & T2 T2 & T3 T3 & T4 T4 & T1 T1 & T2 T2 & T3 T3 & T4 T4 & T1 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The microprocessor may be made to exit from HALT state by asserting A or B or HOLD line READY line any of the five interrupt lines RESTART A or B or HOLD line READY line any of the five interrupt lines RESTART ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 name/names of the 16 bit registers is/are both A and B. stack pointer. program counter. none of these. both A and B. stack pointer. program counter. none of these. ANSWER DOWNLOAD EXAMIANS APP
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