Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 5.5 TRAP RST 7.5 INTR RST 5.5 TRAP RST 7.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The timing difference between a slow memory and fast processor can be resolved if Neither A nor B External buffer is used Processor is capable of waiting Either A or B Neither A nor B External buffer is used Processor is capable of waiting Either A or B ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Total number of instructions in 8085 microprocessor assembly language is 245 247 244 246 245 247 244 246 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor system with memory mapped I/O, which of the following is true? Devices are accessed using IN and OUT instructions Devices have 8-bit address line There can be maximum of 256 input devices and 256 output devices Arithmetic and logic operations can be directly performed with the I/O data Devices are accessed using IN and OUT instructions Devices have 8-bit address line There can be maximum of 256 input devices and 256 output devices Arithmetic and logic operations can be directly performed with the I/O data ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are same as the content of A7-A0 all bits reset (i.e. 00H) all bits set (i.e. FFH) irrelevant same as the content of A7-A0 all bits reset (i.e. 00H) all bits set (i.e. FFH) irrelevant ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The address bus of any microprocessor is always Unidirectional Bi-directional Either unidirectional or bi-directional None Unidirectional Bi-directional Either unidirectional or bi-directional None ANSWER DOWNLOAD EXAMIANS APP
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