Microprocessor Which of the following interrupt is both level and edge sensitive? RST 7.5 RST 5.5 TRAP INTR RST 7.5 RST 5.5 TRAP INTR ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To indicate to user that the microprocessor is working and is ready for use. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To indicate to user that the microprocessor is working and is ready for use. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following statement is false? A microprocessor has an ALU A microprocessor has bi-directional data bus A microprocessor has bi-directional address bus A microprocessor has unidirectional address bus A microprocessor has an ALU A microprocessor has bi-directional data bus A microprocessor has bi-directional address bus A microprocessor has unidirectional address bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not treated as hexadecimal constant by assembler in 8085? 6 AFH 234 45 H 64 H 6 AFH 234 45 H 64 H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The reason for the presence of ALE pin in 8085, but not in 6800 is that 8085 has multiplexed bus, whereas 6800 does not have 8085 has 5 interrupts lines, whereas 6800 has only two 8085 uses I/O mapped I/O, whereas 6800 uses memory mapped I/O None 8085 has multiplexed bus, whereas 6800 does not have 8085 has 5 interrupts lines, whereas 6800 has only two 8085 uses I/O mapped I/O, whereas 6800 uses memory mapped I/O None ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions the microprocessor cannot be interrupted by any mask able interrupt the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any mask able interrupt the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt all interrupts except non-maskable interrupt are disabled ANSWER DOWNLOAD EXAMIANS APP
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