Microprocessor Which of the following interrupt is both level and edge sensitive? RST 7.5 INTR TRAP RST 5.5 RST 7.5 INTR TRAP RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Both the ALU and control section of CPU employ which special purpose storage location? Accumulators Buffers Decoders Registers Accumulators Buffers Decoders Registers ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. A is true but R is false. Both A & R are true but R is not the correct explanation of A. Both A & R are true and R is the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true but R is not the correct explanation of A. Both A & R are true and R is the correct explanation of A. A is false but R is true. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If m is a power of 2, the number of select lines required for an m-input mux is: log2 (m) 2^m 2*m m log2 (m) 2^m 2*m m ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? A memory read cycle An I/O read cycle An op-code fetch cycle A memory write cycle A memory read cycle An I/O read cycle An op-code fetch cycle A memory write cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An e-mail message can be sent to many recipients. False True False True ANSWER DOWNLOAD EXAMIANS APP
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