Microprocessor Which of the following interrupt is both level and edge sensitive? INTR TRAP RST 5.5 RST 7.5 INTR TRAP RST 5.5 RST 7.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is asserted R is asserted, S is negated R is negated, S is negated R is asserted, S is asserted R is negated, S is asserted R is asserted, S is negated R is negated, S is negated R is asserted, S is asserted ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many bytes in a zero memory page should be reserved for vectors used by RST instructions? 128. 32. 16. 64. 128. 32. 16. 64. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 name/names of the 16 bit registers is/are both A and B. program counter. none of these. stack pointer. both A and B. program counter. none of these. stack pointer. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be 01000000 010001000 00000100 11000100 01000000 010001000 00000100 11000100 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not a general purpose peripheral? Programmable CRT controller Programmable interrupt controller Programmable interval timer I/O port Programmable CRT controller Programmable interrupt controller Programmable interval timer I/O port ANSWER DOWNLOAD EXAMIANS APP
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