Microprocessor Which of the following interrupt is both level and edge sensitive? TRAP INTR RST 7.5 RST 5.5 TRAP INTR RST 7.5 RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Maximum of how many devices can be connected simultaneously to the microprocessor via 8257 in DMA data transfer mode? 8 6 10 4 8 6 10 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time More than one device can transmit information over the data bus by enabling only one device at a time The data line can be multiplexed for both input and output It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time More than one device can transmit information over the data bus by enabling only one device at a time The data line can be multiplexed for both input and output ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier.[Hint: Construct the truth table for the adder and the multiplier] Circuit A has the same number of gates as circuit B None of these Circuit B has more gates than circuit A Circuit A has more gates than circuit B Circuit A has the same number of gates as circuit B None of these Circuit B has more gates than circuit A Circuit A has more gates than circuit B ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following instruction may be used to clear the accumulator content irrespective of its initial value? CLR A MOV A, 00H SUB A ORA A CLR A MOV A, 00H SUB A ORA A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A sequence of two registers that multiplies the content of DE register pair by two and stores the result in HL register pair (in 8085 assembly language) is XTHL & DAD H XCHG & DAD B XCHG & DAD H PCHL & DAD D XTHL & DAD H XCHG & DAD B XCHG & DAD H PCHL & DAD D ANSWER DOWNLOAD EXAMIANS APP
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