Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 7.5 TRAP RST 5.5 INTR RST 7.5 TRAP RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): The frequency of 8085 system is ½ of the crystal frequency. Reason(R): Microprocessor (8085) requires a two phase clock. A is true but R is false A is false but R is true Both A & R are true but R is not the correct explanation of A Both A & R are true and R is the correct explanation of A A is true but R is false A is false but R is true Both A & R are true but R is not the correct explanation of A Both A & R are true and R is the correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The characteristics of RESET OUT signal is/are indicates that µp is being reset. this signal can be used to reset other devices. all. the signal is synchronized to the processor clock. indicates that µp is being reset. this signal can be used to reset other devices. all. the signal is synchronized to the processor clock. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SUB A instruction in 8085 reset zero and parity flags sets zero and carry flags reset carry and sign flags sets zero and sign flags reset zero and parity flags sets zero and carry flags reset carry and sign flags sets zero and sign flags ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During OPCODE fetch the state of S0 and S1 is 11 01 10 00 11 01 10 00 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Bus Interface Unit (BIU) in 8086 performs the following functions: All the above. Instruction decoding. Arithmatic and Logic operations. Instruction fetch. All the above. Instruction decoding. Arithmatic and Logic operations. Instruction fetch. ANSWER DOWNLOAD EXAMIANS APP
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