Microprocessor Which of the following interrupt is both level and edge sensitive? RST 5.5 TRAP RST 7.5 INTR RST 5.5 TRAP RST 7.5 INTR ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which memory has read operation, byte erase, byte write and chip erase? EEPROM UVEPROM Both B and C RAM EEPROM UVEPROM Both B and C RAM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is known as Memory bus Control bus Address bus DMA bus Memory bus Control bus Address bus DMA bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor FPGA means Forward Programmable Gate Array Field Programmable Gate Array Field Parallel Gate Array Forward Parallel Gate Array Forward Programmable Gate Array Field Programmable Gate Array Field Parallel Gate Array Forward Parallel Gate Array ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During OPCODE fetch the state of S0 and S1 is 01 10 00 11 01 10 00 11 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T1 OP code fetch T4 OP code fetch T2 OP code fetch T3 OP code fetch T1 OP code fetch T4 OP code fetch T2 OP code fetch T3 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
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