Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 5.5 TRAP RST 7.5 INTR RST 5.5 TRAP RST 7.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is SIM? Set interrupt mask. Sorting interrupt mask. None of these. Select interrupt mask. Set interrupt mask. Sorting interrupt mask. None of these. Select interrupt mask. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations 0FFE H and 0FFF H 1000 H and 1001 H 1000 H and 0FFF H 0FFF H and 0FFE H 0FFE H and 0FFF H 1000 H and 1001 H 1000 H and 0FFF H 0FFF H and 0FFE H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DMA signal/signals in 8085 is/are HOLD. HLDA. READY. All. HOLD. HLDA. READY. All. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While STC instruction executes, only carry and zero flags will be affected. no flags will be affected. all flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. no flags will be affected. all flags will be affected. only carry flag will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Using DeMorgan’s Theorem we can convert any AND-OR structure into OR-NAND NOR-NAND NAND-NAND NAND-NOR OR-NAND NOR-NAND NAND-NAND NAND-NOR ANSWER DOWNLOAD EXAMIANS APP
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