Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is ANI F0H XRI 0FH XRI FOH ANI OFH ANI F0H XRI 0FH XRI FOH ANI OFH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions the microprocessor cannot be interrupted by any mask able interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt the microprocessor cannot be interrupted by any mask able interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The minimum number of transistors required to implement a two input AND gate is 6 4 2 8 6 4 2 8 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The stack pointer register in a microprocessor keeps the address of the next instruction to be fetched holds the address of the top of the stack counts the number of programs being executing on the microprocessor counts the number of instructions being executing on the microprocessor keeps the address of the next instruction to be fetched holds the address of the top of the stack counts the number of programs being executing on the microprocessor counts the number of instructions being executing on the microprocessor ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Increases by 2^(address bits)/addressability Doubles Halves Remains unchanged Increases by 2^(address bits)/addressability Doubles Halves Remains unchanged ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2001H and 2000H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2000H and 1999H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2000H and 1999H to H and L registers respectively 2001H and 2002H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
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