Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is ANI F0H XRI 0FH XRI FOH ANI OFH ANI F0H XRI 0FH XRI FOH ANI OFH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many bytes in a zero memory page should be reserved for vectors used by RST instructions? 32. 16. 64. 128. 32. 16. 64. 128. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because More than one device can transmit information over the data bus by enabling only one device at a time It increases the speed of data transfer over the data bus The data line can be multiplexed for both input and output More than one device can transmit over the data bus at the same time More than one device can transmit information over the data bus by enabling only one device at a time It increases the speed of data transfer over the data bus The data line can be multiplexed for both input and output More than one device can transmit over the data bus at the same time ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During the execution of the instruction, the ________tests the status and control flags and updates them based on the results of executing the instruction. Bus Interface Unit (BIU) Execution Unit (EU) None of these Both ‘c’ and ‘d’ Bus Interface Unit (BIU) Execution Unit (EU) None of these Both ‘c’ and ‘d’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many machine cycles are required for execution of IN 30H instruction 6 5 4 3 6 5 4 3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Complements Clears Can not change Sets Complements Clears Can not change Sets ANSWER DOWNLOAD EXAMIANS APP
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