Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is XRI 0FH XRI FOH ANI F0H ANI OFH XRI 0FH XRI FOH ANI F0H ANI OFH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following? Memory cycle Machine cycle Clock cycle Instruction cycle Memory cycle Machine cycle Clock cycle Instruction cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The correct sequence of steps in the instruction cycle of a basic computer is Fetch, Read effective address, Decode and Execute. Fetch, Execute, Decode and Read effective address. Read effective address, Decode, Fetch and Execute. Fetch, Decode, Read effective address and, Execute. Fetch, Read effective address, Decode and Execute. Fetch, Execute, Decode and Read effective address. Read effective address, Decode, Fetch and Execute. Fetch, Decode, Read effective address and, Execute. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. Stack Pointer PSW B-C D-E Stack Pointer PSW B-C D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The program counter in a 8085 micro-processor is a 16-bit register, because It counts 16-bits at a time There are 16 address lines It has to fetch two 8-bit data at a time It facilitates the user storing 16-bit data temporarily It counts 16-bits at a time There are 16 address lines It has to fetch two 8-bit data at a time It facilitates the user storing 16-bit data temporarily ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct? (II) & (III) (II) only (I) only (I), (II) & (III) (II) & (III) (II) only (I) only (I), (II) & (III) ANSWER DOWNLOAD EXAMIANS APP
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