Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is ANI OFH ANI F0H XRI 0FH XRI FOH ANI OFH ANI F0H XRI 0FH XRI FOH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “1”? OR that bit with “1” and remaining bits with “0”. AND that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. AND that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “0” and remaining bits with “1”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The addressing mode in instruction PUSH B is immediate register indirect register direct immediate register indirect register direct ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct? (II) only (I), (II) & (III) (I) only (II) & (III) (II) only (I), (II) & (III) (I) only (II) & (III) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The operating modes of 8255 A are called Mode 0 and mode 1 Mode 0, mode 1 and mode 2 Mode 0 and mode 2 Mode 0, mode 2 and mode 3 Mode 0 and mode 1 Mode 0, mode 1 and mode 2 Mode 0 and mode 2 Mode 0, mode 2 and mode 3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 002CH 0034H 0000H 003CH 002CH 0034H 0000H 003CH ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS