Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is XRI 0FH XRI FOH ANI OFH ANI F0H XRI 0FH XRI FOH ANI OFH ANI F0H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor PSW stands for accumulator contents accumulator and flag register contents flag byte none accumulator contents accumulator and flag register contents flag byte none ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not a general purpose peripheral? Programmable CRT controller Programmable interval timer Programmable interrupt controller I/O port Programmable CRT controller Programmable interval timer Programmable interrupt controller I/O port ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor with a 12-bit address bus will be able to access 4 K bytes 8 K bytes 10 K bytes 1 K bytes 4 K bytes 8 K bytes 10 K bytes 1 K bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “0”? AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. OR that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. OR that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T4 OP code fetch T3 OP code fetch T2 OP code fetch T1 OP code fetch T4 OP code fetch T3 OP code fetch T2 OP code fetch T1 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
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