Microprocessor The 8085 microprocessor uses a crystal of frequency 6.25 Mhz. The T-state value is 320ns 640ns 1280ns 960ns 320ns 640ns 1280ns 960ns ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is a valid integer constant? 127 125 + 3 127 127 127 125 + 3 127 127 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A structure that stores a number of bits taken “together as a unit” is a Mux Decoder Register Gate Mux Decoder Register Gate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The correct sequence of steps in the instruction cycle of a basic computer is Fetch, Decode, Read effective address and, Execute. Read effective address, Decode, Fetch and Execute. Fetch, Read effective address, Decode and Execute. Fetch, Execute, Decode and Read effective address. Fetch, Decode, Read effective address and, Execute. Read effective address, Decode, Fetch and Execute. Fetch, Read effective address, Decode and Execute. Fetch, Execute, Decode and Read effective address. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T3 OP code fetch T4 OP code fetch T1 OP code fetch T2 OP code fetch T3 OP code fetch T4 OP code fetch T1 OP code fetch T2 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor HLDA signal in 8085 performs the following operation: Indicates that another master is requesting the use of the address and data buses. Hold the data in the accumulator until the microprocessor is turned OFF. Indicates that the CPU has not received the HOLD request. Indicates that the CPU has received the HOLD request and that it will relinquish the bus in the next clock cycle. Indicates that another master is requesting the use of the address and data buses. Hold the data in the accumulator until the microprocessor is turned OFF. Indicates that the CPU has not received the HOLD request. Indicates that the CPU has received the HOLD request and that it will relinquish the bus in the next clock cycle. ANSWER DOWNLOAD EXAMIANS APP
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