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Microprocessor

Microprocessor
Identify the programmable interval timer from the following

 8252
 8275
 8279
 8253

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Microprocessor
XCHG instruction exchanges the content of H-L with ______ register pair.

 B-C
 Stack Pointer
 D-E
 PSW

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Microprocessor
The first machine cycle of an instruction is always

 An I/O read cycle
 A fetch cycle
 A memory read cycle
 A memory write cycle

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Microprocessor
During the execution of the instruction, the ________tests the status and control flags and updates them based on the results of executing the instruction.

 Both ‘c’ and ‘d’
 Bus Interface Unit (BIU)
 Execution Unit (EU)
 None of these

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Microprocessor
DMA is used between

 microprocessor and memory
 microprocessor and I/O
 memory and I/O
 none

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Microprocessor
S0 and S1 pins are used for

None of these
 acknowledging the interrupt
 indicating the processor’s status
 serial communication

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