Microprocessor A combinational PLD with a programmable AND array and a programmable OR array is called a PROM PAL PLA PLD PROM PAL PLA PLD ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The relation among IC (Instruction Cycle), FC (Fetch cycle) and EC (Execute Cycle) is IC = FC + EC IC = FC - EC IC = FC + 2EC EC = IC + FC IC = FC + EC IC = FC - EC IC = FC + 2EC EC = IC + FC ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always An I/O read cycle A memory read cycle A memory write cycle A fetch cycle An I/O read cycle A memory read cycle A memory write cycle A fetch cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with status lines None of these lower order address lines higher order address lines status lines None of these lower order address lines higher order address lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Execution Unit (EU) Both ‘b’ and ‘c’ None of these Bus Interface Unit (BIU) Execution Unit (EU) Both ‘b’ and ‘c’ None of these Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
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