Microprocessor
In 8085

P flag is reset when the result has odd parity
P flag is set when the result has even parity
P flag is set when the result has odd parity
P flag is reset when the result has even parity

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Microprocessor
Assertion(A): The frequency of 8085 system is ½ of the crystal frequency. Reason(R): Microprocessor (8085) requires a two phase clock.

 Both A & R are true and R is the correct explanation of A
 A is false but R is true
 Both A & R are true but R is not the correct explanation of A
 A is true but R is false

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Microprocessor
Cycle stealing mode of DMA operation involves

 DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device
 While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor
 Data transfer takes place between the I/O device and memory during every alternate clock cycle
 The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses

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