Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T2 & T3 T3 & T4 T1 & T2 T4 & T1 T2 & T3 T3 & T4 T1 & T2 T4 & T1 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? An op-code fetch cycle A memory write cycle A memory read cycle An I/O read cycle An op-code fetch cycle A memory write cycle A memory read cycle An I/O read cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The address bus of any microprocessor is always Unidirectional Bi-directional Either unidirectional or bi-directional None Unidirectional Bi-directional Either unidirectional or bi-directional None ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Halves Increases by 2^(address bits)/addressability Remains unchanged Doubles Halves Increases by 2^(address bits)/addressability Remains unchanged Doubles ANSWER DOWNLOAD EXAMIANS APP
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