Microprocessor A microcomputer consists of memory I/O device All of these a microprocessor memory I/O device All of these a microprocessor ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these Forces the assembler to reserve one byte of memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T2 & T3 T1 & T2 T3 & T4 T4 & T1 T2 & T3 T1 & T2 T3 & T4 T4 & T1 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The 8085 microprocessor enters into bus idle machine cycle whenever None of these INTR interrupt is recognized RST 7.5 is recognized DAD RP instruction is executed None of these INTR interrupt is recognized RST 7.5 is recognized DAD RP instruction is executed ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of register C be 00000000 before the instruction DCR C is executed. The content of register C after the after the execution of this instruction will be 11111111 None 00000001 00000000 11111111 None 00000001 00000000 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________is the only non-vectored interrupt in 8085 microprocessor. RST 7 TRAP RST 5.5 INTR RST 7 TRAP RST 5.5 INTR ANSWER DOWNLOAD EXAMIANS APP
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