Microprocessor PSW stands for none flag byte accumulator contents accumulator and flag register contents none flag byte accumulator contents accumulator and flag register contents ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve one byte of memory None of these Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve one byte of memory None of these Forces the assembler to reserve a specified number of bytes in the memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The addressing mode in instruction PUSH B is immediate register register indirect direct immediate register register indirect direct ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick out the matching pair S0;S1;wait status SID; SIM READY; RIM HOLD; DMA S0;S1;wait status SID; SIM READY; RIM HOLD; DMA ANSWER DOWNLOAD EXAMIANS APP
Microprocessor CALL instruction is a ______ instruction. 2 bytes 4 bytes 1 bytes 3 bytes 2 bytes 4 bytes 1 bytes 3 bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations 0FFF H and 0FFE H 0FFE H and 0FFF H 1000 H and 0FFF H 1000 H and 1001 H 0FFF H and 0FFE H 0FFE H and 0FFF H 1000 H and 0FFF H 1000 H and 1001 H ANSWER DOWNLOAD EXAMIANS APP
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