Microprocessor PSW stands for accumulator and flag register contents accumulator contents flag byte none accumulator and flag register contents accumulator contents flag byte none ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Bus Interface Unit (BIU) None of these Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) None of these Both ‘b’ and ‘c’ Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085, the pins for SID and SOD are 4 and 5 respectively 5 and 4 respectively 3 and 4 respectively 4 and 3 respectively 4 and 5 respectively 5 and 4 respectively 3 and 4 respectively 4 and 3 respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many segments are there in 8086? 3. 6. 4. 2. 3. 6. 4. 2. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An 8-bit microprocessor can have ………….. address lines. 8 32 16 cannot be predicted 8 32 16 cannot be predicted ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In order to complement the lower nibble of accumulator one can use ANI 0FH CMA ORI 0FH XRI 0FH ANI 0FH CMA ORI 0FH XRI 0FH ANSWER DOWNLOAD EXAMIANS APP
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