Microprocessor PSW stands for flag byte none accumulator contents accumulator and flag register contents flag byte none accumulator contents accumulator and flag register contents ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The addressing mode in instruction PUSH B is register direct immediate register indirect register direct immediate register indirect ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is ANI F0H XRI FOH ANI OFH XRI 0FH ANI F0H XRI FOH ANI OFH XRI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 5.5 RST 7.5 TRAP INTR RST 5.5 RST 7.5 TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with None of these lower order address lines status lines higher order address lines None of these lower order address lines status lines higher order address lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In microprocessor based system DMA refers to direct memory access for the I/O device None of these direct memory access for the user direct memory access for microprocessor direct memory access for the I/O device None of these direct memory access for the user direct memory access for microprocessor ANSWER DOWNLOAD EXAMIANS APP
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