Microprocessor
In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture.

 Execution Unit (EU)
 None of these
 Bus Interface Unit (BIU)
 Both ‘b’ and ‘c’

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Microprocessor
Cycle stealing mode of DMA operation involves

 Data transfer takes place between the I/O device and memory during every alternate clock cycle
 The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses
 DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device
 While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor

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