Microprocessor
In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture.

 Execution Unit (EU)
 Both ‘b’ and ‘c’
 None of these
 Bus Interface Unit (BIU)

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Microprocessor
Assertion (A): Each memory chip has its own address latch. Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.

A is wrong R is correct
Both A and R are correct but R is not correct explanation of A
A is correct R is wrong
Both A and R are correct and R is correct explanation of A

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Microprocessor
In 8085

P flag is reset when the result has even parity
P flag is reset when the result has odd parity
P flag is set when the result has even parity
P flag is set when the result has odd parity

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