Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In microprocessor based system DMA refers to direct memory access for microprocessor direct memory access for the I/O device direct memory access for the user None of these direct memory access for microprocessor direct memory access for the I/O device direct memory access for the user None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be 00000100 11000100 01000000 010001000 00000100 11000100 01000000 010001000 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If m is a power of 2, the number of select lines required for an m-input mux is: 2*m log2 (m) m 2^m 2*m log2 (m) m 2^m ANSWER DOWNLOAD EXAMIANS APP
Microprocessor FPGA means Field Parallel Gate Array Forward Programmable Gate Array Forward Parallel Gate Array Field Programmable Gate Array Field Parallel Gate Array Forward Programmable Gate Array Forward Parallel Gate Array Field Programmable Gate Array ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An e-mail message can be sent to many recipients. False True False True ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS