Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The microprocessor may be made to exit from HALT state by asserting A or B or HOLD line RESTART any of the five interrupt lines READY line A or B or HOLD line RESTART any of the five interrupt lines READY line ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line. EI RIM SIM DI EI RIM SIM DI ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: Arithmetic Logic Unit (ALU) 1.Performs arithmetic operations 2.Performs comparisons. 3.Communicates with I/O devices 4.Keeps watch on the system Which of these statements are correct? 3 and 4 only 1, 2 and 3 1 and 2 only 1, 2, 3 and 4 3 and 4 only 1, 2 and 3 1 and 2 only 1, 2, 3 and 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. PSW B-C D-E Stack Pointer PSW B-C D-E Stack Pointer ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While INX B instruction execute, only carry and zero flags will be affected only carry flag will be affected no flags will be affected all flags will be affected only carry and zero flags will be affected only carry flag will be affected no flags will be affected all flags will be affected ANSWER DOWNLOAD EXAMIANS APP
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