Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Using DeMorgan’s Theorem we can convert any AND-OR structure into OR-NAND NOR-NAND NAND-NAND NAND-NOR OR-NAND NOR-NAND NAND-NAND NAND-NOR ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The word size of 8085 microprocessor is 8-bit 16-bit 4-bit 20-bit 8-bit 16-bit 4-bit 20-bit ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Maximum number of I/O that can be addressed by the INTEL 8085 is 65536 256 285 512 65536 256 285 512 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? An I/O read cycle A memory write cycle A memory read cycle An op-code fetch cycle An I/O read cycle A memory write cycle A memory read cycle An op-code fetch cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 7.5 TRAP RST 5.5 INTR RST 7.5 TRAP RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
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