Microprocessor RST 3 instruction will cause the processor to branch to the location 0028H 0024H 0000H 0018H 0028H 0024H 0000H 0018H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of register C be 00000000 before the instruction DCR C is executed. The content of register C after the after the execution of this instruction will be 00000001 11111111 00000000 None 00000001 11111111 00000000 None ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The multiplexing of address bus and data buses is used in depends on the internal architecture. none of these. all the microprocessors. never multiplexed. depends on the internal architecture. none of these. all the microprocessors. never multiplexed. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Cache memory and I/O devices Main memory and I/O devices Cache and main memory Two I/O devices Cache memory and I/O devices Main memory and I/O devices Cache and main memory Two I/O devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Remains unchanged Halves Doubles Increases by 2^(address bits)/addressability Remains unchanged Halves Doubles Increases by 2^(address bits)/addressability ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. None of these Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) None of these Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
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