Microprocessor RST 3 instruction will cause the processor to branch to the location 0024H 0018H 0028H 0000H 0024H 0018H 0028H 0000H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is known as Address bus Control bus DMA bus Memory bus Address bus Control bus DMA bus Memory bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many bytes in a zero memory page should be reserved for vectors used by RST instructions? 128. 64. 32. 16. 128. 64. 32. 16. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are always reset always set not affected affected indicating specific conditions always reset always set not affected affected indicating specific conditions ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor based system maximum possible number of input/output devices can be connected using I/O mapped I/O technique is 65536 64 256 512 65536 64 256 512 ANSWER DOWNLOAD EXAMIANS APP
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