Microprocessor RST 3 instruction will cause the processor to branch to the location 0028H 0018H 0000H 0024H 0028H 0018H 0000H 0024H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The timing difference between a slow memory and fast processor can be resolved if Processor is capable of waiting Neither A nor B External buffer is used Either A or B Processor is capable of waiting Neither A nor B External buffer is used Either A or B ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is asserted R is asserted, S is negated R is asserted, S is asserted R is negated, S is negated R is negated, S is asserted R is asserted, S is negated R is asserted, S is asserted R is negated, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following statement is false? A microprocessor has unidirectional address bus A microprocessor has bi-directional data bus A microprocessor has an ALU A microprocessor has bi-directional address bus A microprocessor has unidirectional address bus A microprocessor has bi-directional data bus A microprocessor has an ALU A microprocessor has bi-directional address bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor with a 12-bit address bus will be able to access 1 K bytes 8 K bytes 4 K bytes 10 K bytes 1 K bytes 8 K bytes 4 K bytes 10 K bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor PUSH B instruction in 8085 microprocessor causes registers B & C to be cleared the contents of register B & C to be copied in the stack the contents of register B only to be copied in the stack the contents of registers B & C to be transferred in the stack and and the registers get cleared registers B & C to be cleared the contents of register B & C to be copied in the stack the contents of register B only to be copied in the stack the contents of registers B & C to be transferred in the stack and and the registers get cleared ANSWER DOWNLOAD EXAMIANS APP
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