Microprocessor RST 3 instruction will cause the processor to branch to the location 0028H 0000H 0018H 0024H 0028H 0000H 0018H 0024H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During the execution of the instruction, the ________tests the status and control flags and updates them based on the results of executing the instruction. None of these Both ‘c’ and ‘d’ Execution Unit (EU) Bus Interface Unit (BIU) None of these Both ‘c’ and ‘d’ Execution Unit (EU) Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a vector interrupt the branch address is obtained from a register in the processor. none. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is assigned to a fixed location in memory. the branch address is obtained from a register in the processor. none. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is assigned to a fixed location in memory. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is SIM? Select interrupt mask. Set interrupt mask. Sorting interrupt mask. None of these. Select interrupt mask. Set interrupt mask. Sorting interrupt mask. None of these. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? TRAP RST 5.5 both ‘a’ and ‘b’ RST 6.5 TRAP RST 5.5 both ‘a’ and ‘b’ RST 6.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a computer the data transfer between hard disk and CPU is nearly the same as that between diskette and CPU. False True False True ANSWER DOWNLOAD EXAMIANS APP
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