Microprocessor RST 3 instruction will cause the processor to branch to the location 0018H 0028H 0024H 0000H 0018H 0028H 0024H 0000H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be 11000100 00000100 01000000 010001000 11000100 00000100 01000000 010001000 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? An op-code fetch cycle A memory read cycle A memory write cycle An I/O read cycle An op-code fetch cycle A memory read cycle A memory write cycle An I/O read cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 6.5 RST 5.5 both ‘a’ and ‘b’ TRAP RST 6.5 RST 5.5 both ‘a’ and ‘b’ TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Bus Interface Unit (BIU) in 8086 performs the following functions: Instruction decoding. Instruction fetch. All the above. Arithmatic and Logic operations. Instruction decoding. Instruction fetch. All the above. Arithmatic and Logic operations. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick up the programmable interrupt controller from the following 8275 8279 8259 8257 8275 8279 8259 8257 ANSWER DOWNLOAD EXAMIANS APP
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