Microprocessor Which memory has read operation, byte erase, byte write and chip erase? UVEPROM Both B and C EEPROM RAM UVEPROM Both B and C EEPROM RAM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, only carry and zero flags will be affected. no flags will be affected. all flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. no flags will be affected. all flags will be affected. only carry flag will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DMA signal/signals in 8085 is/are All. READY. HOLD. HLDA. All. READY. HOLD. HLDA. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve one byte of memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? TRAP INTR RST 7.5 RST 5.5 TRAP INTR RST 7.5 RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A sequence of two registers that multiplies the content of DE register pair by two and stores the result in HL register pair (in 8085 assembly language) is XCHG & DAD B PCHL & DAD D XTHL & DAD H XCHG & DAD H XCHG & DAD B PCHL & DAD D XTHL & DAD H XCHG & DAD H ANSWER DOWNLOAD EXAMIANS APP
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