Microprocessor DS directive in 8085 Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When an 8085 microprocessor is reset, the address bus contains 0043H 0000H 002CH 003CH 0043H 0000H 002CH 003CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A high on RESET OUT signifies that all the registers and counters are being reset and this signal can be used to reset external support chip all the registers and counters are being reset all the registers of the CPU are being reset processing can begin when this signal goes high all the registers and counters are being reset and this signal can be used to reset external support chip all the registers and counters are being reset all the registers of the CPU are being reset processing can begin when this signal goes high ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During the execution of the instruction, the ________tests the status and control flags and updates them based on the results of executing the instruction. Both ‘c’ and ‘d’ Execution Unit (EU) Bus Interface Unit (BIU) None of these Both ‘c’ and ‘d’ Execution Unit (EU) Bus Interface Unit (BIU) None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor After RESET 8255 will be in mode 2 mode 0; all ports are input unchanged condition mode 0; all ports are output mode 2 mode 0; all ports are input unchanged condition mode 0; all ports are output ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Identify the non-maskable interrupt from the following RST 6.5 RST 7.5 RST 5.5 RST 4.5 RST 6.5 RST 7.5 RST 5.5 RST 4.5 ANSWER DOWNLOAD EXAMIANS APP
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