Microprocessor DS directive in 8085 Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? RST 7.5 RST 5.5 INTR TRAP RST 7.5 RST 5.5 INTR TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The clock speed of 8085 is 3.2KHz. 1KHz. 1MHz. 3.2MHz. 3.2KHz. 1KHz. 1MHz. 3.2MHz. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. PSW Stack Pointer B-C D-E PSW Stack Pointer B-C D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The stack pointer register in a microprocessor keeps the address of the next instruction to be fetched counts the number of instructions being executing on the microprocessor holds the address of the top of the stack counts the number of programs being executing on the microprocessor keeps the address of the next instruction to be fetched counts the number of instructions being executing on the microprocessor holds the address of the top of the stack counts the number of programs being executing on the microprocessor ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 2, 3, 5 1, 3, 4 1, 2, 5 1, 3, 5 2, 3, 5 1, 3, 4 1, 2, 5 ANSWER DOWNLOAD EXAMIANS APP
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