Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 6.5 RST 5.5 TRAP both ‘a’ and ‘b’ RST 6.5 RST 5.5 TRAP both ‘a’ and ‘b’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor with a 12-bit address bus will be able to access 10 K bytes 8 K bytes 1 K bytes 4 K bytes 10 K bytes 8 K bytes 1 K bytes 4 K bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During OPCODE fetch the state of S0 and S1 is 11 10 01 00 11 10 01 00 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a computer the data transfer between hard disk and CPU is nearly the same as that between diskette and CPU. True False True False ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The address bus of any microprocessor is always Bi-directional None Unidirectional Either unidirectional or bi-directional Bi-directional None Unidirectional Either unidirectional or bi-directional ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While INX B instruction execute, no flags will be affected only carry flag will be affected only carry and zero flags will be affected all flags will be affected no flags will be affected only carry flag will be affected only carry and zero flags will be affected all flags will be affected ANSWER DOWNLOAD EXAMIANS APP
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