Microprocessor
Which one of the following interrupt/interrupts is/are only level triggering?

 RST 6.5
 both ‘a’ and ‘b’
 TRAP
 RST 5.5

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Microprocessor
Cycle stealing mode of DMA operation involves

 The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses
 While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor
 Data transfer takes place between the I/O device and memory during every alternate clock cycle
 DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device

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Microprocessor
When RET instruction is executed by any subroutine then

 the PC will be incremented after the execution of the instruction.
 without any operation, the calling program would resume from instruction immediately following the call instruction.
 without any operation, the calling program would resume from instruction immediately following the call instruction and also the PC will be incremented after the execution of the instruction.
 the top of the stack will be popped out and assigned to the PC.

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