Microprocessor
Which one of the following interrupt/interrupts is/are only level triggering?

 TRAP
 both ‘a’ and ‘b’
 RST 6.5
 RST 5.5

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Microprocessor
How can we make any bit of a register “1”?

 AND that bit with “1” and remaining bits with “0”.
 OR that bit with “1” and remaining bits with “0”.
 OR that bit with “0” and remaining bits with “1”.
 AND that bit with “0” and remaining bits with “1”.

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