Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 5.5 RST 6.5 both ‘a’ and ‘b’ TRAP RST 5.5 RST 6.5 both ‘a’ and ‘b’ TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional A is false but R is true Both A & R are true and R is the correct explanation of A A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true Both A & R are true and R is the correct explanation of A A is true but R is false Both A & R are true but R is not the correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following circuits transmits two messages simultaneously in one direction Quadruplex Simplex Duplex Diplex Quadruplex Simplex Duplex Diplex ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with lower order address lines higher order address lines status lines None of these lower order address lines higher order address lines status lines None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many machine cycles are required for execution of IN 30H instruction 4 5 3 6 4 5 3 6 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a fixed OR array is called a PLA PROM PLD PAL PLA PROM PLD PAL ANSWER DOWNLOAD EXAMIANS APP
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