Microprocessor The timing difference between a slow memory and fast processor can be resolved if Processor is capable of waiting Either A or B External buffer is used Neither A nor B Processor is capable of waiting Either A or B External buffer is used Neither A nor B ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2001H and 2002H to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2000H and 1999H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2000H and 1999H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor without the interrupt facility cannot be used for DMA operation cannot be interfaced with any I/O devices is not useful for process control system is best suited for process control system cannot be used for DMA operation cannot be interfaced with any I/O devices is not useful for process control system is best suited for process control system ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Increases by 2^(address bits)/addressability Remains unchanged Halves Doubles Increases by 2^(address bits)/addressability Remains unchanged Halves Doubles ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 name/names of the 16 bit registers is/are stack pointer. program counter. none of these. both A and B. stack pointer. program counter. none of these. both A and B. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt the microprocessor cannot be interrupted by any mask able interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt the microprocessor cannot be interrupted by any mask able interrupt all interrupts except non-maskable interrupt are disabled ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS