Microprocessor CALL instruction is a ______ instruction. 2 bytes 3 bytes 4 bytes 1 bytes 2 bytes 3 bytes 4 bytes 1 bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Sets Can not change Clears Complements Sets Can not change Clears Complements ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. D-E B-C PSW Stack Pointer D-E B-C PSW Stack Pointer ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of status flags present in 8085 microprocessor are 5 10 8 16 5 10 8 16 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the data transfer is not possible in microprocessor I/O device to accumulator memory to accumulator accumulator to memory memory to memory I/O device to accumulator memory to accumulator accumulator to memory memory to memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? RST 7.5 RST 5.5 INTR TRAP RST 7.5 RST 5.5 INTR TRAP ANSWER DOWNLOAD EXAMIANS APP
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