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Microprocessor

Microprocessor
How many T-states are required for execution of OUT 80H instruction?

 7
 13
 10
 16

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Microprocessor
The address bus of any microprocessor is always

 Bi-directional
 None
 Either unidirectional or bi-directional
 Unidirectional

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Microprocessor
Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable.

WORD (16 bits)
BYTE
NIBBLE
DOUBLEWORD (32 bits)

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Microprocessor
XCHG instruction exchanges the content of H-L with ______ register pair.

 PSW
 D-E
 Stack Pointer
 B-C

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Microprocessor
A single instruction to clear the lower nibble of accumulator in 8085 language assembly is

 XRI 0FH
 ANI F0H
 ANI OFH
 XRI FOH

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Microprocessor
In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture.

 Bus Interface Unit (BIU)
 Both ‘b’ and ‘c’
 None of these
 Execution Unit (EU)

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