Microprocessor How many T-states are required for execution of OUT 80H instruction? 7 13 10 16 7 13 10 16 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The address bus of any microprocessor is always Bi-directional None Either unidirectional or bi-directional Unidirectional Bi-directional None Either unidirectional or bi-directional Unidirectional ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable. WORD (16 bits) BYTE NIBBLE DOUBLEWORD (32 bits) WORD (16 bits) BYTE NIBBLE DOUBLEWORD (32 bits) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. PSW D-E Stack Pointer B-C PSW D-E Stack Pointer B-C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is XRI 0FH ANI F0H ANI OFH XRI FOH XRI 0FH ANI F0H ANI OFH XRI FOH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
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