Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T4 & T1 T3 & T4 T1 & T2 T2 & T3 T4 & T1 T3 & T4 T1 & T2 T2 & T3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Number of Hex digits needed to represent the 20-bit address of a memory location are 20 5 4 16 20 5 4 16 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor , let the accumulator contains the value 0AH and register C contains the value 05H. After CMP C instruction is executed, the zero flag will be reset and carry flag will be set zero and carry flags will be reset zero and carry flags will be set zero flag will be set and carry flag will be reset zero flag will be reset and carry flag will be set zero and carry flags will be reset zero and carry flags will be set zero flag will be set and carry flag will be reset ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is ANI OFH ANI F0H XRI FOH XRI 0FH ANI OFH ANI F0H XRI FOH XRI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 003CH 0000H 0034H 002CH 003CH 0000H 0034H 002CH ANSWER DOWNLOAD EXAMIANS APP
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