Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is negated R is asserted, S is asserted R is negated, S is asserted R is asserted, S is negated R is negated, S is negated R is asserted, S is asserted R is negated, S is asserted R is asserted, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? A memory write cycle An I/O read cycle An op-code fetch cycle A memory read cycle A memory write cycle An I/O read cycle An op-code fetch cycle A memory read cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Maximum of how many devices can be connected simultaneously to the microprocessor via 8257 in DMA data transfer mode? 8 10 6 4 8 10 6 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Identify the programmable interval timer from the following 8275 8252 8279 8253 8275 8252 8279 8253 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor _____________is used to read the status of the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by loading into the A register a byte which defines the condition of the mask bits for the interrupts. DI RIM EI SIM DI RIM EI SIM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct? (II) & (III) (II) only (I), (II) & (III) (I) only (II) & (III) (II) only (I), (II) & (III) (I) only ANSWER DOWNLOAD EXAMIANS APP
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