Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following statement is false? A microprocessor has unidirectional address bus A microprocessor has an ALU A microprocessor has bi-directional data bus A microprocessor has bi-directional address bus A microprocessor has unidirectional address bus A microprocessor has an ALU A microprocessor has bi-directional data bus A microprocessor has bi-directional address bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Halves Increases by 2^(address bits)/addressability Remains unchanged Doubles Halves Increases by 2^(address bits)/addressability Remains unchanged Doubles ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A structure that stores a number of bits taken “together as a unit” is a Decoder Mux Gate Register Decoder Mux Gate Register ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 which addressing mode is also called inherent addressing? Implicit Register Direct Immediate Implicit Register Direct Immediate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, the RST6 instruction transfer programme execution to following location 0030H. 0024H. 0048H. 0060H. 0030H. 0024H. 0048H. 0060H. ANSWER DOWNLOAD EXAMIANS APP
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