Microprocessor Length of the instruction POP D is 2 byte 1 byte 3 byte 4 byte 2 byte 1 byte 3 byte 4 byte ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If m is a power of 2, the number of select lines required for an m-input mux is: 2^m log2 (m) 2*m m 2^m log2 (m) 2*m m ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The timing difference between a slow memory and fast processor can be resolved if Either A or B Neither A nor B Processor is capable of waiting External buffer is used Either A or B Neither A nor B Processor is capable of waiting External buffer is used ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The register which holds the information about the nature of results of arithmetic and logic operations is called as Process status register Flag register Condition code register Accumulator Process status register Flag register Condition code register Accumulator ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The minimum number of transistors required to implement a two input AND gate is 2 4 6 8 2 4 6 8 ANSWER DOWNLOAD EXAMIANS APP
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