Microprocessor Length of the instruction POP D is 4 byte 3 byte 1 byte 2 byte 4 byte 3 byte 1 byte 2 byte ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Each instruction in an assembly language program has the following fields 1. Label field 2. Mnemonic field 3. Operand field 4. Comment field What are the correct sequence of these fields? 1, 2, 3 and 4 1, 3, 2 and 4 2, 4, 1 and 3 2, 1, 4 and 3 1, 2, 3 and 4 1, 3, 2 and 4 2, 4, 1 and 3 2, 1, 4 and 3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While STC instruction executes, all flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. no flags will be affected. all flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. no flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The operating modes of 8255 A are called Mode 0 and mode 1 Mode 0, mode 1 and mode 2 Mode 0 and mode 2 Mode 0, mode 2 and mode 3 Mode 0 and mode 1 Mode 0, mode 1 and mode 2 Mode 0 and mode 2 Mode 0, mode 2 and mode 3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Two I/O devices Cache and main memory Cache memory and I/O devices Main memory and I/O devices Two I/O devices Cache and main memory Cache memory and I/O devices Main memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
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