Microprocessor A microprocessor differentiates between op code, data/address at any time by the sequence in which memory contents are fetched by it the stack pointer the program counter its internal registers the sequence in which memory contents are fetched by it the stack pointer the program counter its internal registers ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: Arithmetic Logic Unit (ALU) 1.Performs arithmetic operations 2.Performs comparisons. 3.Communicates with I/O devices 4.Keeps watch on the system Which of these statements are correct? 3 and 4 only 1, 2, 3 and 4 1, 2 and 3 1 and 2 only 3 and 4 only 1, 2, 3 and 4 1, 2 and 3 1 and 2 only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to memory address register . incremented by one. transferred to memory data register. transferred to address bus. transferred to memory address register . incremented by one. transferred to memory data register. transferred to address bus. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T2 & T3 T4 & T1 T3 & T4 T1 & T2 T2 & T3 T4 & T1 T3 & T4 T1 & T2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 which addressing mode is also called inherent addressing? Register Implicit Immediate Direct Register Implicit Immediate Direct ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following instruction will never affect the zero flag? DCR R DCX Rp ORA R XRA R DCR R DCX Rp ORA R XRA R ANSWER DOWNLOAD EXAMIANS APP
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