Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which components are NOT found on chip in a microprocessor but may be found on chip in a microcontroller? EPROM & PORTS SRAM, EPROM & PORTS SRAM & USART EPROM, USART & PORTS EPROM & PORTS SRAM, EPROM & PORTS SRAM & USART EPROM, USART & PORTS ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations 1000 H and 0FFF H 0FFF H and 0FFE H 1000 H and 1001 H 0FFE H and 0FFF H 1000 H and 0FFF H 0FFF H and 0FFE H 1000 H and 1001 H 0FFE H and 0FFF H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Ready signal of microprocessor is used to detect whether a peripheral is ready for the data transfer or not. Reason(R): In the microprocessor during data transfer operations, the wait states are added by forcing the ready signal low. A is true but R is false. Both A & R are true and R is the correct explanation of A. A is false but R is true. Both A & R are true but R is not the correct explanation of A . A is true but R is false. Both A & R are true and R is the correct explanation of A. A is false but R is true. Both A & R are true but R is not the correct explanation of A . ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________is the only non-vectored interrupt in 8085 microprocessor. RST 7 RST 5.5 TRAP INTR RST 7 RST 5.5 TRAP INTR ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? Program Counter. H-L. Stack Pointer. D-E. Program Counter. H-L. Stack Pointer. D-E. ANSWER DOWNLOAD EXAMIANS APP
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