Microprocessor In 8085 P flag is reset when the result has even parity P flag is set when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is set when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has odd parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to memory data register. incremented by one. transferred to address bus. transferred to memory address register . transferred to memory data register. incremented by one. transferred to address bus. transferred to memory address register . ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line. RIM EI DI SIM RIM EI DI SIM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Maximum of how many devices can be connected simultaneously to the microprocessor via 8257 in DMA data transfer mode? 4 8 6 10 4 8 6 10 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a microcomputer , the address of memory locations are binary numbers that identify each memory circuit where a byte is stored. If a microcomputer uses 20-bit address, then numbers of different memory locations are 220-1 220 20 220 - 1 220-1 220 20 220 - 1 ANSWER DOWNLOAD EXAMIANS APP
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