In 8085 | EXAMIANS

Microprocessor
In 8085

P flag is reset when the result has even parity

P flag is reset when the result has odd parity

P flag is set when the result has odd parity

P flag is set when the result has even parity

P flag is reset when the result has even parity

P flag is reset when the result has odd parity

P flag is set when the result has odd parity

P flag is set when the result has even parity

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Microprocessor
Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier.[Hint: Construct the truth table for the adder and the multiplier]

Circuit B has more gates than circuit A

Circuit A has the same number of gates as circuit B

Circuit A has more gates than circuit B

None of these

Circuit B has more gates than circuit A

Circuit A has the same number of gates as circuit B

Circuit A has more gates than circuit B

None of these

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Microprocessor
Which one of the following circuits transmits two messages simultaneously in one direction

Duplex

Diplex

Simplex

Quadruplex

Duplex

Diplex

Simplex

Quadruplex

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Microprocessor
Cycle stealing mode of DMA operation involves

The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses

Data transfer takes place between the I/O device and memory during every alternate clock cycle

DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device

While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor

The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses

Data transfer takes place between the I/O device and memory during every alternate clock cycle

DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device

While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor

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Microprocessor
In C the keywords are also called

Class words

Character words

Special words

Reserved words

Class words

Character words

Special words

Reserved words

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Microprocessor
During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)?

T1 OP code fetch

T3 OP code fetch

T4 OP code fetch

T2 OP code fetch

T1 OP code fetch

T3 OP code fetch

T4 OP code fetch

T2 OP code fetch

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Microprocessor

Microprocessor In 8085

Microprocessor Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier.[Hint: Construct the truth table for the adder and the multiplier]

Microprocessor Which one of the following circuits transmits two messages simultaneously in one direction

Microprocessor Cycle stealing mode of DMA operation involves

Microprocessor In C the keywords are also called

Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)?

Microprocessor
In 8085

Microprocessor
Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier.[Hint: Construct the truth table for the adder and the multiplier]

Microprocessor
Which one of the following circuits transmits two messages simultaneously in one direction

Microprocessor
Cycle stealing mode of DMA operation involves

Microprocessor
In C the keywords are also called

Microprocessor
During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)?