Microprocessor In 8085 P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is set when the result has even parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is set when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Maximum number of I/O that can be addressed by the INTEL 8085 is 65536 285 256 512 65536 285 256 512 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The frequency of the driving network connected between pins 1 and 2 of 8085 microprocessor is twice the desired frequency four times the desired frequency equal to the desired frequency None of these twice the desired frequency four times the desired frequency equal to the desired frequency None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When an 8085 microprocessor is reset, the address bus contains 002CH 003CH 0000H 0043H 002CH 003CH 0000H 0043H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor based system maximum possible number of input/output devices can be connected using I/O mapped I/O technique is 64 512 65536 256 64 512 65536 256 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. B-C PSW D-E Stack Pointer B-C PSW D-E Stack Pointer ANSWER DOWNLOAD EXAMIANS APP
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