Microprocessor In 8085 P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Total number of modes the 8253 can work 8 6 12 4 8 6 12 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor S0 and S1 pins are used for acknowledging the interrupt indicating the processor’s status serial communication None of these acknowledging the interrupt indicating the processor’s status serial communication None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick up the programmable interrupt controller from the following 8279 8257 8259 8275 8279 8257 8259 8275 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following is not correct? An interrupt signal is required at the start of every program An instruction is a set of bits that defines a computer operation Bus is a group of wires Bootstrap is a technique or device for loading first instruction An interrupt signal is required at the start of every program An instruction is a set of bits that defines a computer operation Bus is a group of wires Bootstrap is a technique or device for loading first instruction ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to memory address register . transferred to memory data register. transferred to address bus. incremented by one. transferred to memory address register . transferred to memory data register. transferred to address bus. incremented by one. ANSWER DOWNLOAD EXAMIANS APP