Microprocessor In 8085 P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A number of 1-bit registers used in microprocessors to indicate certain conditions are usually referred to as latches flags counters shift registers latches flags counters shift registers ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘b’ and ‘c’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The control flags in 8086 are: the interrupt flag(IF). the direction flag(DF). the Trap flag(TF). All of these the interrupt flag(IF). the direction flag(DF). the Trap flag(TF). All of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following pair of gates can form a latch? A pair of cross copled AND A pair of cross coupled NAND A pair of cross coupled OR A cross coupled NAND/OR A pair of cross copled AND A pair of cross coupled NAND A pair of cross coupled OR A cross coupled NAND/OR ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Using DeMorgan’s Theorem we can convert any AND-OR structure into OR-NAND NOR-NAND NAND-NAND NAND-NOR OR-NAND NOR-NAND NAND-NAND NAND-NOR ANSWER DOWNLOAD EXAMIANS APP
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