Microprocessor In 8085 P flag is set when the result has odd parity P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is reset when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is reset when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a programmable OR array is called a PLD PAL PROM PLA PLD PAL PROM PLA ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To indicate to user that the microprocessor is working and is ready for use. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2001H and 2002H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1999H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, all flags will be affected. only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. all flags will be affected. only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be 00000100 11000100 01000000 010001000 00000100 11000100 01000000 010001000 ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS