Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2000H and 1999H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2000H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2000H to H and L registers respectively 2001H and 2002H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor RST0 - RST7 are the __________ in 8085. hardware interrupts logical interrupts software interrupts conditional interrupts hardware interrupts logical interrupts software interrupts conditional interrupts ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 5.5 TRAP RST 6.5 both ‘a’ and ‘b’ RST 5.5 TRAP RST 6.5 both ‘a’ and ‘b’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many bytes in a zero memory page should be reserved for vectors used by RST instructions? 16. 128. 32. 64. 16. 128. 32. 64. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The program counter in a 8085 micro-processor is a 16-bit register, because It facilitates the user storing 16-bit data temporarily There are 16 address lines It has to fetch two 8-bit data at a time It counts 16-bits at a time It facilitates the user storing 16-bit data temporarily There are 16 address lines It has to fetch two 8-bit data at a time It counts 16-bits at a time ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Bus Interface Unit (BIU) Execution Unit (EU) Both ‘b’ and ‘c’ None of these Bus Interface Unit (BIU) Execution Unit (EU) Both ‘b’ and ‘c’ None of these ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS