Microprocessor
Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be

 00000100
 11000100
 010001000
 01000000

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Microprocessor
Cycle stealing mode of DMA operation involves

 DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device
 Data transfer takes place between the I/O device and memory during every alternate clock cycle
 The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses
 While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor

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Microprocessor
The correct sequence of steps in the instruction cycle of a basic computer is

 Read effective address, Decode, Fetch and Execute.
 Fetch, Decode, Read effective address and, Execute.
 Fetch, Execute, Decode and Read effective address.
 Fetch, Read effective address, Decode and Execute.

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