Microprocessor PUSH B instruction in 8085 microprocessor causes registers B & C to be cleared the contents of registers B & C to be transferred in the stack and and the registers get cleared the contents of register B only to be copied in the stack the contents of register B & C to be copied in the stack registers B & C to be cleared the contents of registers B & C to be transferred in the stack and and the registers get cleared the contents of register B only to be copied in the stack the contents of register B & C to be copied in the stack ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ALU (Arithmetic and Logic Unit ) of 8085 microprocessor consists of Accumulator, temporary register, arithmetic and logic circuits Accumulator, arithmetic, logic circuits and five flags Accumulator, arithmetic and logic circuits Accumulator, temporary register, arithmetic, logic circuits and five flags Accumulator, temporary register, arithmetic and logic circuits Accumulator, arithmetic, logic circuits and five flags Accumulator, arithmetic and logic circuits Accumulator, temporary register, arithmetic, logic circuits and five flags ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is ANI OFH XRI FOH XRI 0FH ANI F0H ANI OFH XRI FOH XRI 0FH ANI F0H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following statements for intel 8085 is correct? PC specifies the address of the instruction to be executed PC specifies the number of instructions executed so far Program Counter (PC) specifies the address of the instruction last executed PC specifies the address of the instruction being executed PC specifies the address of the instruction to be executed PC specifies the number of instructions executed so far Program Counter (PC) specifies the address of the instruction last executed PC specifies the address of the instruction being executed ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. ANSWER DOWNLOAD EXAMIANS APP