Microprocessor In 8085 which addressing mode is also called inherent addressing? Immediate Direct Implicit Register Immediate Direct Implicit Register ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? H-L. D-E. Stack Pointer. Program Counter. H-L. D-E. Stack Pointer. Program Counter. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is negated R is negated, S is negated R is negated, S is asserted R is asserted, S is asserted R is asserted, S is negated R is negated, S is negated R is negated, S is asserted R is asserted, S is asserted ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The operations executed by two or more control units are referred as Bi control-operations Micro-operations Multi-operations Macro-operations Bi control-operations Micro-operations Multi-operations Macro-operations ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is the size (in bytes) of Prefetch queue in 8086? 4. 6. 2. 3. 4. 6. 2. 3. ANSWER DOWNLOAD EXAMIANS APP
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