In 8085 which addressing mode is also called inherent addressing?

Microprocessor
In 8085 which addressing mode is also called inherent addressing?

Immediate

Direct

Implicit

Register

Immediate

Direct

Implicit

Register

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Microprocessor
When RET instruction is executed by any subroutine then

the PC will be incremented after the execution of the instruction.

without any operation, the calling program would resume from instruction immediately following the call instruction.

the top of the stack will be popped out and assigned to the PC.

without any operation, the calling program would resume from instruction immediately following the call instruction and also the PC will be incremented after the execution of the instruction.

the PC will be incremented after the execution of the instruction.

without any operation, the calling program would resume from instruction immediately following the call instruction.

the top of the stack will be popped out and assigned to the PC.

without any operation, the calling program would resume from instruction immediately following the call instruction and also the PC will be incremented after the execution of the instruction.

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Microprocessor
The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following?

Memory cycle

Instruction cycle

Machine cycle

Clock cycle

Memory cycle

Instruction cycle

Machine cycle

Clock cycle

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Microprocessor
The data bus of any microprocessor is always

None

Unidirectional

Either unidirectional or bi-directional

Bi-directional

None

Unidirectional

Either unidirectional or bi-directional

Bi-directional

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Microprocessor
We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete

Set of {AND,OR,NOT}

Set of {AND,OR}

Set of {EXOR, NOT}

None of these

Set of {AND,OR,NOT}

Set of {AND,OR}

Set of {EXOR, NOT}

None of these

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Microprocessor
While INX B instruction execute,

only carry flag will be affected

no flags will be affected

all flags will be affected

only carry and zero flags will be affected

only carry flag will be affected

no flags will be affected

all flags will be affected

only carry and zero flags will be affected

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Microprocessor

Microprocessor In 8085 which addressing mode is also called inherent addressing?

Microprocessor When RET instruction is executed by any subroutine then

Microprocessor The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following?

Microprocessor The data bus of any microprocessor is always

Microprocessor We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete

Microprocessor While INX B instruction execute,

Microprocessor
In 8085 which addressing mode is also called inherent addressing?

Microprocessor
When RET instruction is executed by any subroutine then

Microprocessor
The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following?

Microprocessor
The data bus of any microprocessor is always

Microprocessor
We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete

Microprocessor
While INX B instruction execute,