Microprocessor In 8085 which addressing mode is also called inherent addressing? Immediate Register Implicit Direct Immediate Register Implicit Direct ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always A memory write cycle An I/O read cycle A memory read cycle A fetch cycle A memory write cycle An I/O read cycle A memory read cycle A fetch cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are same as the content of A7-A0 all bits set (i.e. FFH) irrelevant all bits reset (i.e. 00H) same as the content of A7-A0 all bits set (i.e. FFH) irrelevant all bits reset (i.e. 00H) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The operations executed by two or more control units are referred as Macro-operations Micro-operations Multi-operations Bi control-operations Macro-operations Micro-operations Multi-operations Bi control-operations ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is the size (in bytes) of Prefetch queue in 8086? 4. 6. 2. 3. 4. 6. 2. 3. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Register pair used to indicate memory D and E W and Z B and C H and L D and E W and Z B and C H and L ANSWER DOWNLOAD EXAMIANS APP
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