Microprocessor In 8085 which addressing mode is also called inherent addressing? Direct Implicit Register Immediate Direct Implicit Register Immediate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is the size (in bytes) of Prefetch queue in 8086? 3. 4. 6. 2. 3. 4. 6. 2. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T4 OP code fetch T1 OP code fetch T2 OP code fetch T3 OP code fetch T4 OP code fetch T1 OP code fetch T2 OP code fetch T3 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is used to access 16-bit data in 8086? Pipeline architecture. None of these Data Banking. Memory Banking. Pipeline architecture. None of these Data Banking. Memory Banking. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion (A): Negative values of incremental operator in DO loop are allowed in Fortran 77 but not in earlier versions of Fortran. Reason (R): Fortran 77 has better array facilities than earlier versions of Fortran. A is wrong R is correct Both A and R are correct but R is not correct explanation of A A is correct R is wrong Both A and R are correct and R is correct explanation of A A is wrong R is correct Both A and R are correct but R is not correct explanation of A A is correct R is wrong Both A and R are correct and R is correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick out the matching pair HOLD; DMA READY; RIM SID; SIM S0;S1;wait status HOLD; DMA READY; RIM SID; SIM S0;S1;wait status ANSWER DOWNLOAD EXAMIANS APP
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