Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to address bus. transferred to memory data register. transferred to memory address register . incremented by one. transferred to address bus. transferred to memory data register. transferred to memory address register . incremented by one. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________is the only non-vectored interrupt in 8085 microprocessor. TRAP INTR RST 5.5 RST 7 TRAP INTR RST 5.5 RST 7 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor which one of the following statement is wrong there is a pin available for serial output serial I/O is not possible serial I/O is possible through SIM and RIM instruction there is a pin available for serial input there is a pin available for serial output serial I/O is not possible serial I/O is possible through SIM and RIM instruction there is a pin available for serial input ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 5.5 TRAP both ‘a’ and ‘b’ RST 6.5 RST 5.5 TRAP both ‘a’ and ‘b’ RST 6.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The microprocessor issues ALE during first T-state of memory WRITE cycle only every machine cycle fetch cycle only memory READ cycle only memory WRITE cycle only every machine cycle fetch cycle only memory READ cycle only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Output of the assembler in machine codes is referred to as Object program Source program Macroinstruction Symbolic addressing Object program Source program Macroinstruction Symbolic addressing ANSWER DOWNLOAD EXAMIANS APP
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