Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to address bus. transferred to memory data register. transferred to memory address register . incremented by one. transferred to address bus. transferred to memory data register. transferred to memory address register . incremented by one. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is type declaration statement in C? prin = prin * prin king = horse + 1 int bar s = s + 1 prin = prin * prin king = horse + 1 int bar s = s + 1 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with lower order address lines higher order address lines None of these status lines lower order address lines higher order address lines None of these status lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In microprocessor based system DMA refers to None of these direct memory access for the I/O device direct memory access for the user direct memory access for microprocessor None of these direct memory access for the I/O device direct memory access for the user direct memory access for microprocessor ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The correct sequence of steps in the instruction cycle of a basic computer is Fetch, Decode, Read effective address and, Execute. Read effective address, Decode, Fetch and Execute. Fetch, Read effective address, Decode and Execute. Fetch, Execute, Decode and Read effective address. Fetch, Decode, Read effective address and, Execute. Read effective address, Decode, Fetch and Execute. Fetch, Read effective address, Decode and Execute. Fetch, Execute, Decode and Read effective address. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these ANSWER DOWNLOAD EXAMIANS APP
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