Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to address bus. transferred to memory data register. transferred to memory address register . incremented by one. transferred to address bus. transferred to memory data register. transferred to memory address register . incremented by one. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with higher order address lines None of these lower order address lines status lines higher order address lines None of these lower order address lines status lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor with a 12-bit address bus will be able to access 1 K bytes 10 K bytes 4 K bytes 8 K bytes 1 K bytes 10 K bytes 4 K bytes 8 K bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor For a memory with a 16-bit address space, the addressability is 16 bits 2^16 bits Cannot be determined 8 bits 16 bits 2^16 bits Cannot be determined 8 bits ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What are the sets of commands in a program which are not translated into machine instructions during assembly process, called? Directives Identifiers Mnemonics Operands Directives Identifiers Mnemonics Operands ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. None of these ANSWER DOWNLOAD EXAMIANS APP
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