Microprocessor The first machine cycle of an instruction is always An I/O read cycle A fetch cycle A memory read cycle A memory write cycle An I/O read cycle A fetch cycle A memory read cycle A memory write cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is set when the result has even parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is set when the result has even parity P flag is reset when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a vector interrupt the branch address is obtained from a register in the processor. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is assigned to a fixed location in memory. none. the branch address is obtained from a register in the processor. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is assigned to a fixed location in memory. none. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following microprocessor has 16-bit data bus? 6502 68000 8085 Z-80 6502 68000 8085 Z-80 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a fixed OR array is called a PAL PROM PLA PLD PAL PROM PLA PLD ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During the execution of the instruction, the ________tests the status and control flags and updates them based on the results of executing the instruction. None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘c’ and ‘d’ None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘c’ and ‘d’ ANSWER DOWNLOAD EXAMIANS APP
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