Microprocessor In a vector interrupt none. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is assigned to a fixed location in memory. the branch address is obtained from a register in the processor. none. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is assigned to a fixed location in memory. the branch address is obtained from a register in the processor. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A 37 bit mantissa has an accuracy of 8 decimal places 10 decimal places 6 decimal places 11 decimal places 8 decimal places 10 decimal places 6 decimal places 11 decimal places ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The stack is nothing but a set of reserved RAM address space reserved ROM address space None of these reserved I/O address space reserved RAM address space reserved ROM address space None of these reserved I/O address space ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SUB A instruction in 8085 reset zero and parity flags reset carry and sign flags sets zero and carry flags sets zero and sign flags reset zero and parity flags reset carry and sign flags sets zero and carry flags sets zero and sign flags ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? Program Counter. H-L. D-E. Stack Pointer. Program Counter. H-L. D-E. Stack Pointer. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ None of these Bus Interface Unit (BIU) Execution Unit (EU) Both ‘b’ and ‘c’ None of these Bus Interface Unit (BIU) Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
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