Microprocessor Maximum of how many devices can be connected simultaneously to the microprocessor via 8257 in DMA data transfer mode? 8 4 6 10 8 4 6 10 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 P flag is set when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is set when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is reset when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Of the following circuits, the one which involves storage is Decoder RS Latch Nand Mux Decoder RS Latch Nand Mux ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T3 & T4 T2 & T3 T1 & T2 T4 & T1 T3 & T4 T2 & T3 T1 & T2 T4 & T1 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Each instruction in an assembly language program has the following fields 1. Label field 2. Mnemonic field 3. Operand field 4. Comment field What are the correct sequence of these fields? 1, 2, 3 and 4 2, 1, 4 and 3 1, 3, 2 and 4 2, 4, 1 and 3 1, 2, 3 and 4 2, 1, 4 and 3 1, 3, 2 and 4 2, 4, 1 and 3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor based system maximum possible number of input/output devices can be connected using I/O mapped I/O technique is 256 512 64 65536 256 512 64 65536 ANSWER DOWNLOAD EXAMIANS APP
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