Microprocessor Consider the following I) Sign flag II) Trap flag III) Parity flag IV) Auxiliary carry flag. Which one of the above flags is/are present in 8085 microprocessor? (I) & (II) (I) ,(III) & (IV) (II) & (III) (I) only (I) & (II) (I) ,(III) & (IV) (II) & (III) (I) only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated R is negated, S is asserted ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor based system maximum possible number of input/output devices can be connected using I/O mapped I/O technique is 256 65536 512 64 256 65536 512 64 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to address bus. transferred to memory address register . incremented by one. transferred to memory data register. transferred to address bus. transferred to memory address register . incremented by one. transferred to memory data register. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable. DOUBLEWORD (32 bits) BYTE NIBBLE WORD (16 bits) DOUBLEWORD (32 bits) BYTE NIBBLE WORD (16 bits) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When an 8085 microprocessor is reset, the address bus contains 003CH 0043H 0000H 002CH 003CH 0043H 0000H 002CH ANSWER DOWNLOAD EXAMIANS APP
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