Microprocessor The operations executed by two or more control units are referred as Micro-operations Bi control-operations Multi-operations Macro-operations Micro-operations Bi control-operations Multi-operations Macro-operations ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because More than one device can transmit over the data bus at the same time The data line can be multiplexed for both input and output It increases the speed of data transfer over the data bus More than one device can transmit information over the data bus by enabling only one device at a time More than one device can transmit over the data bus at the same time The data line can be multiplexed for both input and output It increases the speed of data transfer over the data bus More than one device can transmit information over the data bus by enabling only one device at a time ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 7.5 TRAP RST 5.5 INTR RST 7.5 TRAP RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In one’s complement 8 bit representation 11111111 represents -0 1 +0 -1 -0 1 +0 -1 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to address bus. transferred to memory data register. incremented by one. transferred to memory address register . transferred to address bus. transferred to memory data register. incremented by one. transferred to memory address register . ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Identify the non-maskable interrupt from the following RST 7.5 RST 6.5 RST 5.5 RST 4.5 RST 7.5 RST 6.5 RST 5.5 RST 4.5 ANSWER DOWNLOAD EXAMIANS APP
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