Microprocessor The operations executed by two or more control units are referred as Multi-operations Bi control-operations Micro-operations Macro-operations Multi-operations Bi control-operations Micro-operations Macro-operations ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion (A): Negative values of incremental operator in DO loop are allowed in Fortran 77 but not in earlier versions of Fortran. Reason (R): Fortran 77 has better array facilities than earlier versions of Fortran. Both A and R are correct but R is not correct explanation of A Both A and R are correct and R is correct explanation of A A is wrong R is correct A is correct R is wrong Both A and R are correct but R is not correct explanation of A Both A and R are correct and R is correct explanation of A A is wrong R is correct A is correct R is wrong ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Execution Unit (EU) None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor differentiates between op code, data/address at any time by the program counter the sequence in which memory contents are fetched by it the stack pointer its internal registers the program counter the sequence in which memory contents are fetched by it the stack pointer its internal registers ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt the microprocessor cannot be interrupted by any mask able interrupt all interrupts except non-maskable interrupt are disabled the microprocessor cannot be interrupted by any interrupt the microprocessor can be interrupted by a non-mask able interrupt the microprocessor cannot be interrupted by any mask able interrupt all interrupts except non-maskable interrupt are disabled ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The 8085 microprocessor enters into bus idle machine cycle whenever RST 7.5 is recognized None of these DAD RP instruction is executed INTR interrupt is recognized RST 7.5 is recognized None of these DAD RP instruction is executed INTR interrupt is recognized ANSWER DOWNLOAD EXAMIANS APP
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