Microprocessor
During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)?

 T3 OP code fetch
 T4 OP code fetch
 T2 OP code fetch
 T1 OP code fetch

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Microprocessor
Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions

 the microprocessor can be interrupted by a non-mask able interrupt
 the microprocessor cannot be interrupted by any mask able interrupt
 the microprocessor cannot be interrupted by any interrupt
 all interrupts except non-maskable interrupt are disabled

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