Microprocessor Identify the communication interfacing device from the following 8251 8155 8257 8255 8251 8155 8257 8255 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A sequence of two registers that multiplies the content of DE register pair by two and stores the result in HL register pair (in 8085 assembly language) is XTHL & DAD H XCHG & DAD H XCHG & DAD B PCHL & DAD D XTHL & DAD H XCHG & DAD H XCHG & DAD B PCHL & DAD D ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of output pins in 8085 microprocessors are 21. 27. 19. 40. 21. 27. 19. 40. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because More than one device can transmit over the data bus at the same time It increases the speed of data transfer over the data bus More than one device can transmit information over the data bus by enabling only one device at a time The data line can be multiplexed for both input and output More than one device can transmit over the data bus at the same time It increases the speed of data transfer over the data bus More than one device can transmit information over the data bus by enabling only one device at a time The data line can be multiplexed for both input and output ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? both ‘a’ and ‘b’ RST 6.5 RST 5.5 TRAP both ‘a’ and ‘b’ RST 6.5 RST 5.5 TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor PSW stands for flag byte none accumulator contents accumulator and flag register contents flag byte none accumulator contents accumulator and flag register contents ANSWER DOWNLOAD EXAMIANS APP
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