Microprocessor During OPCODE fetch the state of S0 and S1 is 00 10 11 01 00 10 11 01 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations 1000 H and 1001 H 0FFF H and 0FFE H 1000 H and 0FFF H 0FFE H and 0FFF H 1000 H and 1001 H 0FFF H and 0FFE H 1000 H and 0FFF H 0FFE H and 0FFF H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 0000H 0034H 002CH 003CH 0000H 0034H 002CH 003CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T1 OP code fetch T4 OP code fetch T3 OP code fetch T2 OP code fetch T1 OP code fetch T4 OP code fetch T3 OP code fetch T2 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A number of 1-bit registers used in microprocessors to indicate certain conditions are usually referred to as counters flags latches shift registers counters flags latches shift registers ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is a valid integer constant? 127 127 125 + 3 127 127 127 125 + 3 127 ANSWER DOWNLOAD EXAMIANS APP
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