Microprocessor During OPCODE fetch the state of S0 and S1 is 01 11 10 00 01 11 10 00 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are always reset always set affected indicating specific conditions not affected always reset always set affected indicating specific conditions not affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The maximum number of seven segment displays that can be connected to 8279 is 18 16 12 8 18 16 12 8 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T1 OP code fetch T4 OP code fetch T2 OP code fetch T3 OP code fetch T1 OP code fetch T4 OP code fetch T2 OP code fetch T3 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SUB A instruction in 8085 reset carry and sign flags sets zero and carry flags sets zero and sign flags reset zero and parity flags reset carry and sign flags sets zero and carry flags sets zero and sign flags reset zero and parity flags ANSWER DOWNLOAD EXAMIANS APP
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