Microprocessor During OPCODE fetch the state of S0 and S1 is 01 10 00 11 01 10 00 11 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is XRI 0FH ANI F0H XRI FOH ANI OFH XRI 0FH ANI F0H XRI FOH ANI OFH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always A memory write cycle A fetch cycle A memory read cycle An I/O read cycle A memory write cycle A fetch cycle A memory read cycle An I/O read cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor EPROMs are preferred for storing programs while developing new microprocessor based system. Because of their random access characteristic erasable and programmable characteristic non-volatile characteristic all the above characteristic random access characteristic erasable and programmable characteristic non-volatile characteristic all the above characteristic ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, only carry flag will be affected. no flags will be affected. only carry and zero flags will be affected. all flags will be affected. only carry flag will be affected. no flags will be affected. only carry and zero flags will be affected. all flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
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