Microprocessor During OPCODE fetch the state of S0 and S1 is 00 11 10 01 00 11 10 01 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. D-E Stack Pointer B-C PSW D-E Stack Pointer B-C PSW ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following microprocessor is not an 8-bit microprocessor 68000 8085 6502 Z-80 68000 8085 6502 Z-80 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is ANI F0H XRI 0FH XRI FOH ANI OFH ANI F0H XRI 0FH XRI FOH ANI OFH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor PSW stands for accumulator and flag register contents flag byte accumulator contents none accumulator and flag register contents flag byte accumulator contents none ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 0034H 0000H 003CH 002CH 0034H 0000H 003CH 002CH ANSWER DOWNLOAD EXAMIANS APP
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