Microprocessor During OPCODE fetch the state of S0 and S1 is 01 10 00 11 01 10 00 11 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor After RESET 8255 will be in mode 2 mode 0; all ports are output mode 0; all ports are input unchanged condition mode 2 mode 0; all ports are output mode 0; all ports are input unchanged condition ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The frequency of the driving network connected between pins 1 and 2 of 8085 microprocessor is equal to the desired frequency twice the desired frequency None of these four times the desired frequency equal to the desired frequency twice the desired frequency None of these four times the desired frequency ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is XRI FOH ANI OFH ANI F0H XRI 0FH XRI FOH ANI OFH ANI F0H XRI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Two I/O devices Main memory and I/O devices Cache and main memory Cache memory and I/O devices Two I/O devices Main memory and I/O devices Cache and main memory Cache memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
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