Microprocessor During OPCODE fetch the state of S0 and S1 is 10 11 00 01 10 11 00 01 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick up the programmable interrupt controller from the following 8257 8275 8279 8259 8257 8275 8279 8259 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a programmable OR array is called a PLA PROM PAL PLD PLA PROM PAL PLD ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve a specified number of consecutive bytes in the memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ‘Burst refresh’ in DRAM is also called None of these Concentrated refresh Hidden refresh Distributed refresh None of these Concentrated refresh Hidden refresh Distributed refresh ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always An I/O read cycle A memory read cycle A memory write cycle A fetch cycle An I/O read cycle A memory read cycle A memory write cycle A fetch cycle ANSWER DOWNLOAD EXAMIANS APP
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