Microprocessor During OPCODE fetch the state of S0 and S1 is 01 11 10 00 01 11 10 00 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Bus Interface Unit (BIU) in 8086 performs the following functions: All the above. Instruction fetch. Arithmatic and Logic operations. Instruction decoding. All the above. Instruction fetch. Arithmatic and Logic operations. Instruction decoding. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable. WORD (16 bits) BYTE NIBBLE DOUBLEWORD (32 bits) WORD (16 bits) BYTE NIBBLE DOUBLEWORD (32 bits) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. A is false but R is true. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is true but R is false. A is false but R is true. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is true but R is false. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A real number consists of Integer part Integer part and fraction part None of these Integer part, fraction part along with positive or negative sign Integer part Integer part and fraction part None of these Integer part, fraction part along with positive or negative sign ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following registers: 1. Accumulator and flag register 2. B and C register 3. D and E register 4. H and L register Which of these 8-bit registers of 8085 microprocessor can be paired together to make a 16-bit register? 1, 2 and 4 1, 3 and 4 1, 2 and 3 2, 3 and 4 1, 2 and 4 1, 3 and 4 1, 2 and 3 2, 3 and 4 ANSWER DOWNLOAD EXAMIANS APP
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