Microprocessor During OPCODE fetch the state of S0 and S1 is 10 11 01 00 10 11 01 00 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a fixed OR array is called a PLD PLA PROM PAL PLD PLA PROM PAL ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. all flags will be affected. only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. all flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor RST 3 instruction will cause the processor to branch to the location 0018H 0028H 0024H 0000H 0018H 0028H 0024H 0000H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 name/names of the 16 bit registers is/are both A and B. none of these. stack pointer. program counter. both A and B. none of these. stack pointer. program counter. ANSWER DOWNLOAD EXAMIANS APP
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