Microprocessor Which instruction is required to rotate the content of accumulator one bit right along with carry? RAL RAR RLC RRC RAL RAR RLC RRC ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T1 & T2 T3 & T4 T4 & T1 T2 & T3 T1 & T2 T3 & T4 T4 & T1 T2 & T3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The control flags in 8086 are: the Trap flag(TF). the direction flag(DF). the interrupt flag(IF). All of these the Trap flag(TF). the direction flag(DF). the interrupt flag(IF). All of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the sign bit of mantissa is 0 and the exponent is increased from a positive to a more negative number the result is A negative floating point number A larger floating point number A smaller floating point number Either A or B depending on the actual number A negative floating point number A larger floating point number A smaller floating point number Either A or B depending on the actual number ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): The frequency of 8085 system is ½ of the crystal frequency. Reason(R): Microprocessor (8085) requires a two phase clock. Both A & R are true and R is the correct explanation of A A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true Both A & R are true and R is the correct explanation of A A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A sequence of two registers that multiplies the content of DE register pair by two and stores the result in HL register pair (in 8085 assembly language) is XCHG & DAD B XTHL & DAD H XCHG & DAD H PCHL & DAD D XCHG & DAD B XTHL & DAD H XCHG & DAD H PCHL & DAD D ANSWER DOWNLOAD EXAMIANS APP
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