Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. Stack Pointer D-E PSW B-C Stack Pointer D-E PSW B-C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During OPCODE fetch the state of S0 and S1 is 01 00 10 11 01 00 10 11 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct? (II) & (III) (II) only (I), (II) & (III) (I) only (II) & (III) (II) only (I), (II) & (III) (I) only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of hardware interrupts present in 8085 microprocessor are 8 5 16 10 8 5 16 10 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “1”? OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An 8-bit microprocessor can have ………….. address lines. 8 16 32 cannot be predicted 8 16 32 cannot be predicted ANSWER DOWNLOAD EXAMIANS APP
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