Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. PSW Stack Pointer D-E B-C PSW Stack Pointer D-E B-C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor For a memory with a 16-bit address space, the addressability is 2^16 bits 16 bits Cannot be determined 8 bits 2^16 bits 16 bits Cannot be determined 8 bits ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many T-states are required for execution of OUT 80H instruction? 16 10 13 7 16 10 13 7 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The minimum number of transistors required to implement a two input AND gate is 8 2 6 4 8 2 6 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with lower order address lines status lines None of these higher order address lines lower order address lines status lines None of these higher order address lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be 01000000 00000100 010001000 11000100 01000000 00000100 010001000 11000100 ANSWER DOWNLOAD EXAMIANS APP
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