Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. PSW D-E Stack Pointer B-C PSW D-E Stack Pointer B-C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct? (I), (II) & (III) (I) only (II) only (II) & (III) (I), (II) & (III) (I) only (II) only (II) & (III) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Identify the programmable interval timer from the following 8253 8275 8279 8252 8253 8275 8279 8252 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DMA signal/signals in 8085 is/are HLDA. All. READY. HOLD. HLDA. All. READY. HOLD. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? D-E. H-L. Program Counter. Stack Pointer. D-E. H-L. Program Counter. Stack Pointer. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When referring to instruction words, a mnemonic is a short abbreviation for the operation to be performed. a short abbreviation for the operand address. shorthand for machine language. a short abbreviation for the data word stored at the operand address. a short abbreviation for the operation to be performed. a short abbreviation for the operand address. shorthand for machine language. a short abbreviation for the data word stored at the operand address. ANSWER DOWNLOAD EXAMIANS APP
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