Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. PSW Stack Pointer D-E B-C PSW Stack Pointer D-E B-C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which language could be used for programming an FPGA. None Both A and B Verilog VHDL None Both A and B Verilog VHDL ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line. SIM DI RIM EI SIM DI RIM EI ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T2 OP code fetch T3 OP code fetch T1 OP code fetch T4 OP code fetch T2 OP code fetch T3 OP code fetch T1 OP code fetch T4 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor differentiates between op code, data/address at any time by the sequence in which memory contents are fetched by it the program counter the stack pointer its internal registers the sequence in which memory contents are fetched by it the program counter the stack pointer its internal registers ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The interrupt facility is provided in microprocessor to keep a control on the working of the microprocessor change the sequence of the instructions being executed stop the microprocessor when it starts malfunctioning stop the microprocessor when desired keep a control on the working of the microprocessor change the sequence of the instructions being executed stop the microprocessor when it starts malfunctioning stop the microprocessor when desired ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS