Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. Stack Pointer PSW D-E B-C Stack Pointer PSW D-E B-C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If m is a power of 2, the number of select lines required for an m-input mux is: m 2^m 2*m log2 (m) m 2^m 2*m log2 (m) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The control flags in 8086 are: the interrupt flag(IF). the Trap flag(TF). the direction flag(DF). All of these the interrupt flag(IF). the Trap flag(TF). the direction flag(DF). All of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is XRI 0FH ANI OFH XRI FOH ANI F0H XRI 0FH ANI OFH XRI FOH ANI F0H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Maximum number of I/O that can be addressed by the INTEL 8085 is 256 512 65536 285 256 512 65536 285 ANSWER DOWNLOAD EXAMIANS APP
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