Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. B-C Stack Pointer PSW D-E B-C Stack Pointer PSW D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Remains unchanged Increases by 2^(address bits)/addressability Halves Doubles Remains unchanged Increases by 2^(address bits)/addressability Halves Doubles ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Register pair used to indicate memory B and C W and Z H and L D and E B and C W and Z H and L D and E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor , let the accumulator contains the value 0AH and register C contains the value 05H. After CMP C instruction is executed, the zero and carry flags will be set zero and carry flags will be reset zero flag will be set and carry flag will be reset zero flag will be reset and carry flag will be set zero and carry flags will be set zero and carry flags will be reset zero flag will be set and carry flag will be reset zero flag will be reset and carry flag will be set ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DMA is used between none microprocessor and memory memory and I/O microprocessor and I/O none microprocessor and memory memory and I/O microprocessor and I/O ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS