Microprocessor ________is the only non-vectored interrupt in 8085 microprocessor. RST 5.5 RST 7 INTR TRAP RST 5.5 RST 7 INTR TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. Stack Pointer PSW B-C D-E Stack Pointer PSW B-C D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A mask programmed ROM is programmed by the user programmed at the time of fabrication erasable electrically erasable and programmable programmed by the user programmed at the time of fabrication erasable electrically erasable and programmable ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is known as Memory bus Address bus DMA bus Control bus Memory bus Address bus DMA bus Control bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional Both A & R are true and R is the correct explanation of A A is false but R is true Both A & R are true but R is not the correct explanation of A A is true but R is false Both A & R are true and R is the correct explanation of A A is false but R is true Both A & R are true but R is not the correct explanation of A A is true but R is false ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits set (i.e. FFH) irrelevant same as the content of A7-A0 all bits reset (i.e. 00H) all bits set (i.e. FFH) irrelevant same as the content of A7-A0 all bits reset (i.e. 00H) ANSWER DOWNLOAD EXAMIANS APP
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