Microprocessor ________is the only non-vectored interrupt in 8085 microprocessor. RST 7 INTR TRAP RST 5.5 RST 7 INTR TRAP RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? TRAP RST 6.5 both ‘a’ and ‘b’ RST 5.5 TRAP RST 6.5 both ‘a’ and ‘b’ RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a programmable OR array is called a PAL PLD PROM PLA PAL PLD PROM PLA ANSWER DOWNLOAD EXAMIANS APP
Microprocessor We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete Set of {AND,OR} Set of {EXOR, NOT} None of these Set of {AND,OR,NOT} Set of {AND,OR} Set of {EXOR, NOT} None of these Set of {AND,OR,NOT} ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The correct sequence of steps in the instruction cycle of a basic computer is Fetch, Read effective address, Decode and Execute. Read effective address, Decode, Fetch and Execute. Fetch, Execute, Decode and Read effective address. Fetch, Decode, Read effective address and, Execute. Fetch, Read effective address, Decode and Execute. Read effective address, Decode, Fetch and Execute. Fetch, Execute, Decode and Read effective address. Fetch, Decode, Read effective address and, Execute. ANSWER DOWNLOAD EXAMIANS APP
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