Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? Program Counter. Stack Pointer. D-E. H-L. Program Counter. Stack Pointer. D-E. H-L. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 5.5 TRAP both ‘a’ and ‘b’ RST 6.5 RST 5.5 TRAP both ‘a’ and ‘b’ RST 6.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “0”? OR that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. OR that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not treated as hexadecimal constant by assembler in 8085? 64 H 234 6 AFH 45 H 64 H 234 6 AFH 45 H ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS