Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time More than one device can transmit information over the data bus by enabling only one device at a time The data line can be multiplexed for both input and output It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time More than one device can transmit information over the data bus by enabling only one device at a time The data line can be multiplexed for both input and output ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A high on RESET OUT signifies that processing can begin when this signal goes high all the registers of the CPU are being reset all the registers and counters are being reset and this signal can be used to reset external support chip all the registers and counters are being reset processing can begin when this signal goes high all the registers of the CPU are being reset all the registers and counters are being reset and this signal can be used to reset external support chip all the registers and counters are being reset ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? RST 5.5 RST 7.5 INTR TRAP RST 5.5 RST 7.5 INTR TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The operations executed by two or more control units are referred as Macro-operations Multi-operations Micro-operations Bi control-operations Macro-operations Multi-operations Micro-operations Bi control-operations ANSWER DOWNLOAD EXAMIANS APP
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