Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 2, 3, 5 1, 2, 5 1, 3, 4 1, 3, 5 2, 3, 5 1, 2, 5 1, 3, 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always An I/O read cycle A memory read cycle A memory write cycle A fetch cycle An I/O read cycle A memory read cycle A memory write cycle A fetch cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. all flags will be affected. only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. all flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To indicate to user that the microprocessor is working and is ready for use. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To indicate to user that the microprocessor is working and is ready for use. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The microprocessor may be made to exit from HALT state by asserting any of the five interrupt lines READY line RESTART A or B or HOLD line any of the five interrupt lines READY line RESTART A or B or HOLD line ANSWER DOWNLOAD EXAMIANS APP
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