Microprocessor In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations 0FFF H and 0FFE H 1000 H and 1001 H 0FFE H and 0FFF H 1000 H and 0FFF H 0FFF H and 0FFE H 1000 H and 1001 H 0FFE H and 0FFF H 1000 H and 0FFF H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is set when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is set when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a C expression using assignment operators, relational operators and arithmetic operators, the hierarchy of operations (in the absence of parenthesis) is Assignment, relational, arithmetic Arithmetic, relational, assignment Relational, assignment, arithmetic Arithmetic, assignment, relational Assignment, relational, arithmetic Arithmetic, relational, assignment Relational, assignment, arithmetic Arithmetic, assignment, relational ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? H-L. D-E. Program Counter. Stack Pointer. H-L. D-E. Program Counter. Stack Pointer. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor FPGA means Forward Parallel Gate Array Field Parallel Gate Array Forward Programmable Gate Array Field Programmable Gate Array Forward Parallel Gate Array Field Parallel Gate Array Forward Programmable Gate Array Field Programmable Gate Array ANSWER DOWNLOAD EXAMIANS APP
Microprocessor After RESET 8255 will be in mode 0; all ports are output mode 0; all ports are input unchanged condition mode 2 mode 0; all ports are output mode 0; all ports are input unchanged condition mode 2 ANSWER DOWNLOAD EXAMIANS APP
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