After RESET 8255 will be in

Microprocessor
After RESET 8255 will be in

mode 0; all ports are input

unchanged condition

mode 0; all ports are output

mode 2

mode 0; all ports are input

unchanged condition

mode 0; all ports are output

mode 2

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Microprocessor
At the beginning of a fetch cycle, the contents of the program counter are

incremented by one.

transferred to address bus.

transferred to memory address register .

transferred to memory data register.

incremented by one.

transferred to address bus.

transferred to memory address register .

transferred to memory data register.

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Microprocessor
A number of 1-bit registers used in microprocessors to indicate certain conditions are usually referred to as

flags

counters

shift registers

latches

flags

counters

shift registers

latches

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Microprocessor
Cycle stealing mode of DMA operation involves

Data transfer takes place between the I/O device and memory during every alternate clock cycle

The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses

DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device

While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor

Data transfer takes place between the I/O device and memory during every alternate clock cycle

The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses

DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device

While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor

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Microprocessor
Which one of the following interrupt/interrupts is/are only level triggering?

TRAP

RST 5.5

both ‘a’ and ‘b’

RST 6.5

TRAP

RST 5.5

both ‘a’ and ‘b’

RST 6.5

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Microprocessor
How can we make any bit of a register “0”?

OR that bit with “0” and remaining bits with “1”.

AND that bit with “1” and remaining bits with “0”.

AND that bit with “0” and remaining bits with “1”.

OR that bit with “1” and remaining bits with “0”.

OR that bit with “0” and remaining bits with “1”.

AND that bit with “1” and remaining bits with “0”.

AND that bit with “0” and remaining bits with “1”.

OR that bit with “1” and remaining bits with “0”.

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Microprocessor

Microprocessor After RESET 8255 will be in

Microprocessor At the beginning of a fetch cycle, the contents of the program counter are

Microprocessor A number of 1-bit registers used in microprocessors to indicate certain conditions are usually referred to as

Microprocessor Cycle stealing mode of DMA operation involves

Microprocessor Which one of the following interrupt/interrupts is/are only level triggering?

Microprocessor How can we make any bit of a register “0”?

Microprocessor
After RESET 8255 will be in

Microprocessor
At the beginning of a fetch cycle, the contents of the program counter are

Microprocessor
A number of 1-bit registers used in microprocessors to indicate certain conditions are usually referred to as

Microprocessor
Cycle stealing mode of DMA operation involves

Microprocessor
Which one of the following interrupt/interrupts is/are only level triggering?

Microprocessor
How can we make any bit of a register “0”?