Microprocessor In one’s complement 8 bit representation 11111111 represents +0 -0 -1 1 +0 -0 -1 1 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While STC instruction executes, only carry flag will be affected. all flags will be affected. no flags will be affected. only carry and zero flags will be affected. only carry flag will be affected. all flags will be affected. no flags will be affected. only carry and zero flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Monostablemultivibrators (IC74121) are used in a microprocessor based system for frequency measurement. Reason(R): Microprocessor counts the number of interrupt signals/second or within a specified interval through ISR. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The timing difference between a slow memory and fast processor can be resolved if Processor is capable of waiting Either A or B External buffer is used Neither A nor B Processor is capable of waiting Either A or B External buffer is used Neither A nor B ANSWER DOWNLOAD EXAMIANS APP
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